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IR: Implement FPVectorNeg
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@@ -1707,6 +1707,19 @@ U128 IREmitter::FPVectorMulAdd(size_t esize, const U128& a, const U128& b, const
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return {};
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}
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U128 IREmitter::FPVectorNeg(size_t esize, const U128& a) {
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switch (esize) {
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case 16:
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return Inst<U128>(Opcode::FPVectorNeg16, a);
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case 32:
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return Inst<U128>(Opcode::FPVectorNeg32, a);
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case 64:
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return Inst<U128>(Opcode::FPVectorNeg64, a);
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}
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UNREACHABLE();
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return {};
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}
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U128 IREmitter::FPVectorPairedAdd(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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case 32:
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@@ -301,6 +301,7 @@ public:
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U128 FPVectorGreaterEqual(size_t esize, const U128& a, const U128& b);
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U128 FPVectorMul(size_t esize, const U128& a, const U128& b);
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U128 FPVectorMulAdd(size_t esize, const U128& addend, const U128& op1, const U128& op2);
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U128 FPVectorNeg(size_t esize, const U128& a);
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U128 FPVectorPairedAdd(size_t esize, const U128& a, const U128& b);
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U128 FPVectorPairedAddLower(size_t esize, const U128& a, const U128& b);
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U128 FPVectorRSqrtEstimate(size_t esize, const U128& a);
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@@ -443,6 +443,9 @@ OPCODE(FPVectorMul32, T::U128, T::U128,
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OPCODE(FPVectorMul64, T::U128, T::U128, T::U128 )
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OPCODE(FPVectorMulAdd32, T::U128, T::U128, T::U128, T::U128 )
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OPCODE(FPVectorMulAdd64, T::U128, T::U128, T::U128, T::U128 )
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OPCODE(FPVectorNeg16, T::U128, T::U128 )
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OPCODE(FPVectorNeg32, T::U128, T::U128 )
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OPCODE(FPVectorNeg64, T::U128, T::U128 )
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OPCODE(FPVectorPairedAddLower32, T::U128, T::U128, T::U128 )
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OPCODE(FPVectorPairedAddLower64, T::U128, T::U128, T::U128 )
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OPCODE(FPVectorPairedAdd32, T::U128, T::U128, T::U128 )
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