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ir: Add opcodes for performing halving adds
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@@ -882,6 +882,32 @@ U128 IREmitter::VectorGreaterUnsigned(size_t esize, const U128& a, const U128& b
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return VectorNot(VectorEqual(esize, VectorMinUnsigned(esize, a, b), a));
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}
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U128 IREmitter::VectorHalvingAddSigned(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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case 8:
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return Inst<U128>(Opcode::VectorHalvingAddS8, a, b);
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case 16:
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return Inst<U128>(Opcode::VectorHalvingAddS16, a, b);
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case 32:
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return Inst<U128>(Opcode::VectorHalvingAddS32, a, b);
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}
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UNREACHABLE();
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return {};
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}
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U128 IREmitter::VectorHalvingAddUnsigned(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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case 8:
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return Inst<U128>(Opcode::VectorHalvingAddU8, a, b);
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case 16:
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return Inst<U128>(Opcode::VectorHalvingAddU16, a, b);
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case 32:
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return Inst<U128>(Opcode::VectorHalvingAddU32, a, b);
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}
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UNREACHABLE();
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return {};
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}
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U128 IREmitter::VectorInterleaveLower(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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case 8:
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