ir: Add opcodes for performing halving adds

This commit is contained in:
Lioncash
2018-05-04 08:22:14 -04:00
committed by MerryMage
parent 3d00dd63b4
commit 089096948a
4 changed files with 131 additions and 6 deletions

View File

@@ -882,6 +882,32 @@ U128 IREmitter::VectorGreaterUnsigned(size_t esize, const U128& a, const U128& b
return VectorNot(VectorEqual(esize, VectorMinUnsigned(esize, a, b), a));
}
U128 IREmitter::VectorHalvingAddSigned(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorHalvingAddS8, a, b);
case 16:
return Inst<U128>(Opcode::VectorHalvingAddS16, a, b);
case 32:
return Inst<U128>(Opcode::VectorHalvingAddS32, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorHalvingAddUnsigned(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorHalvingAddU8, a, b);
case 16:
return Inst<U128>(Opcode::VectorHalvingAddU16, a, b);
case 32:
return Inst<U128>(Opcode::VectorHalvingAddU32, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorInterleaveLower(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8: