SwitchEmu/dynarmic
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/dynarmic.git synced 2026-03-05 10:16:30 +00:00
Code Issues Packages Projects Releases Wiki Activity

A64: Implement FMLS (vector), single/double variant

Browse Source
This commit is contained in:
MerryMage
2018-07-25 13:45:02 +01:00
parent 64c2f698a2
commit 0de37b11ad
2 changed files with 16 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/frontend/A64/decoder/a64.inc
View File

@@ -735,7 +735,7 @@ INST(FCMEQ_reg_4, "FCMEQ (register)", "0Q001
INST(AND_asimd, "AND (vector)", "0Q001110001mmmmm000111nnnnnddddd")
INST(BIC_asimd_reg, "BIC (vector, register)", "0Q001110011mmmmm000111nnnnnddddd")
//INST(FMINNM_2, "FMINNM (vector)", "0Q0011101z1mmmmm110001nnnnnddddd")
//INST(FMLS_vec_2, "FMLS (vector)", "0Q0011101z1mmmmm110011nnnnnddddd")
INST(FMLS_vec_2, "FMLS (vector)", "0Q0011101z1mmmmm110011nnnnnddddd")
INST(FSUB_2, "FSUB (vector)", "0Q0011101z1mmmmm110101nnnnnddddd")
//INST(FMLSL_vec_1, "FMLSL, FMLSL2 (vector)", "0Q0011101z1mmmmm111011nnnnnddddd")
//INST(FMIN_2, "FMIN (vector)", "0Q0011101z1mmmmm111101nnnnnddddd")