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A64: Implement MOVI, MVNI, ORR (vector, immediate), BIC (vector, immediate)
There wasn't a clean way to seperate these instructions out.
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79
src/frontend/A64/translate/impl/simd_modified_immediate.cpp
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79
src/frontend/A64/translate/impl/simd_modified_immediate.cpp
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/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "common/bit_util.h"
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#include "frontend/A64/translate/impl/impl.h"
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namespace Dynarmic::A64 {
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bool TranslatorVisitor::MOVI(bool Q, bool op, Imm<1> a, Imm<1> b, Imm<1> c, Imm<4> cmode, Imm<1> d, Imm<1> e, Imm<1> f, Imm<1> g, Imm<1> h, Vec Vd) {
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const size_t datasize = Q ? 128 : 64;
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// MOVI
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// also FMOV (vector, immediate) when cmode == 0b1111
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const auto movi = [&]{
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u64 imm64 = AdvSIMDExpandImm(op, cmode, concatenate(a, b, c, d, e, f, g, h));
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const IR::U128 imm = datasize == 64 ? ir.ZeroExtendToQuad(ir.Imm64(imm64)) : ir.VectorBroadcast64(ir.Imm64(imm64));
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V(128, Vd, imm);
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return true;
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};
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// MVNI
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const auto mvni = [&]{
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u64 imm64 = ~AdvSIMDExpandImm(op, cmode, concatenate(a, b, c, d, e, f, g, h));
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const IR::U128 imm = datasize == 64 ? ir.ZeroExtendToQuad(ir.Imm64(imm64)) : ir.VectorBroadcast64(ir.Imm64(imm64));
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V(128, Vd, imm);
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return true;
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};
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// ORR (vector, immediate)
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const auto orr = [&]{
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u64 imm64 = AdvSIMDExpandImm(op, cmode, concatenate(a, b, c, d, e, f, g, h));
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const IR::U128 imm = datasize == 64 ? ir.ZeroExtendToQuad(ir.Imm64(imm64)) : ir.VectorBroadcast64(ir.Imm64(imm64));
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const IR::U128 operand = V(datasize, Vd);
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const IR::U128 result = ir.VectorOr(operand, imm);
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V(datasize, Vd, result);
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return true;
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};
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// BIC (vector, immediate)
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const auto bic = [&]{
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u64 imm64 = ~AdvSIMDExpandImm(op, cmode, concatenate(a, b, c, d, e, f, g, h));
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const IR::U128 imm = datasize == 64 ? ir.ZeroExtendToQuad(ir.Imm64(imm64)) : ir.VectorBroadcast64(ir.Imm64(imm64));
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const IR::U128 operand = V(datasize, Vd);
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const IR::U128 result = ir.VectorAnd(operand, imm);
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V(datasize, Vd, result);
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return true;
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};
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switch (concatenate(cmode, Imm<1>{op}).ZeroExtend()) {
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case 0b00000: case 0b00100: case 0b01000: case 0b01100:
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case 0b10000: case 0b10100:
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case 0b11000: case 0b11010:
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case 0b11100: case 0b11101: case 0b11110:
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return movi();
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case 0b11111:
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if (!Q) {
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return UnallocatedEncoding();
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}
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return movi();
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case 0b00001: case 0b00101: case 0b01001: case 0b01101:
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case 0b10001: case 0b10101:
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case 0b11001: case 0b11011:
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return mvni();
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case 0b00010: case 0b00110: case 0b01010: case 0b01110:
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case 0b10010: case 0b10110:
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return orr();
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case 0b00011: case 0b00111: case 0b01011: case 0b01111:
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case 0b10011: case 0b10111:
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return bic();
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}
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UNREACHABLE();
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return true;
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}
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} // namespace Dynarmic::A64
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