SwitchEmu/dynarmic
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/dynarmic.git synced 2026-03-10 20:06:28 +00:00
Code Issues Packages Projects Releases Wiki Activity

ir: Add opcodes for signed absolute differences

Browse Source
This commit is contained in:
Lioncash
2018-05-08 15:39:37 -04:00
committed by MerryMage
parent d3b44c1b5a
commit 1e10017f4b
4 changed files with 66 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
src/frontend/ir/ir_emitter.cpp
View File

@@ -1225,6 +1225,19 @@ U128 IREmitter::VectorSignExtend(size_t original_esize, const U128& a) {
return {};
}
U128 IREmitter::VectorSignedAbsoluteDifference(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorSignedAbsoluteDifference8, a, b);
case 16:
return Inst<U128>(Opcode::VectorSignedAbsoluteDifference16, a, b);
case 32:
return Inst<U128>(Opcode::VectorSignedAbsoluteDifference32, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorSub(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:

1
src/frontend/ir/ir_emitter.h
View File

@@ -240,6 +240,7 @@ public:
U128 VectorShuffleLowHalfwords(const U128& a, u8 mask);
U128 VectorShuffleWords(const U128& a, u8 mask);
U128 VectorSignExtend(size_t original_esize, const U128& a);
U128 VectorSignedAbsoluteDifference(size_t esize, const U128& a, const U128& b);
U128 VectorSub(size_t esize, const U128& a, const U128& b);
U128 VectorUnsignedAbsoluteDifference(size_t esize, const U128& a, const U128& b);
U128 VectorZeroExtend(size_t original_esize, const U128& a);

3
src/frontend/ir/opcodes.inc
View File

@@ -332,6 +332,9 @@ OPCODE(VectorSignExtend8, T::U128, T::U128
OPCODE(VectorSignExtend16, T::U128, T::U128 )
OPCODE(VectorSignExtend32, T::U128, T::U128 )
OPCODE(VectorSignExtend64, T::U128, T::U128 )
OPCODE(VectorSignedAbsoluteDifference8, T::U128, T::U128, T::U128 )
OPCODE(VectorSignedAbsoluteDifference16, T::U128, T::U128, T::U128 )
OPCODE(VectorSignedAbsoluteDifference32, T::U128, T::U128, T::U128 )
OPCODE(VectorSub8, T::U128, T::U128, T::U128 )
OPCODE(VectorSub16, T::U128, T::U128, T::U128 )
OPCODE(VectorSub32, T::U128, T::U128, T::U128 )