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A32: Implement load stores (immediate)

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MerryMage
2018-01-10 01:13:23 +00:00
parent 2aadeec291
commit 25411da838
14 changed files with 411 additions and 122 deletions
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64
src/frontend/A64/decoder/a64.h
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@@ -201,10 +201,10 @@ std::vector<Matcher<V>> GetDecodeTable() {
//INST(&V::LDAR, "LDAR", "1-00100011011111111111nnnnnttttt"),
// Loads and stores - Load register (literal)
//INST(&V::LDR_lit_gen, "LDR (literal)", "0-011000iiiiiiiiiiiiiiiiiiittttt"),
INST(&V::LDR_lit_gen, "LDR (literal)", "0z011000iiiiiiiiiiiiiiiiiiittttt"),
INST(&V::LDRSW_lit, "LDRSW (literal)", "10011000iiiiiiiiiiiiiiiiiiittttt"),
INST(&V::PRFM_lit, "PRFM (literal)", "11011000iiiiiiiiiiiiiiiiiiittttt"),
//INST(&V::LDR_lit_fpsimd, "LDR (literal, SIMD&FP)", "oo011100iiiiiiiiiiiiiiiiiiittttt"),
//INST(&V::LDRSW_lit, "LDRSW (literal)", "10011000iiiiiiiiiiiiiiiiiiittttt"),
//INST(&V::PRFM_lit, "PRFM (literal)", "11011000iiiiiiiiiiiiiiiiiiittttt"),
// Loads and stores - Load/Store no-allocate pair
//INST(&V::STNP_gen, "STNP", "-010100000iiiiiiiuuuuunnnnnttttt"),
@@ -230,54 +230,24 @@ std::vector<Matcher<V>> GetDecodeTable() {
//INST(&V::LDPSW_3, "LDPSW", "0110100101iiiiiiiuuuuunnnnnttttt"),
// Loads and stores - Load/Store register (unscaled immediate)
//INST(&V::STURB, "STURB", "00111000000iiiiiiiii00nnnnnttttt"),
//INST(&V::LDURB, "LDURB", "00111000010iiiiiiiii00nnnnnttttt"),
//INST(&V::LDURSB, "LDURSB", "001110001-0iiiiiiiii00nnnnnttttt"),
INST(&V::STURx_LDURx, "STURx/LDURx", "zz111000oo0iiiiiiiii00nnnnnttttt"),
INST(&V::UnallocatedEncoding, "", "111110001-0---------00----------"),
INST(&V::UnallocatedEncoding, "", "10111000110---------00----------"),
//INST(&V::PRFM_imm, "PRFM (immediate)", "1111100110iiiiiiiiiiiinnnnnttttt"),
//INST(&V::STUR_fpsimd, "STUR (SIMD&FP)", "zz111100-00iiiiiiiii00nnnnnttttt"),
//INST(&V::LDUR_fpsimd, "LDUR (SIMD&FP)", "zz111100-10iiiiiiiii00nnnnnttttt"),
//INST(&V::STURH, "STURH", "01111000000iiiiiiiii00nnnnnttttt"),
//INST(&V::LDURH, "LDURH", "01111000010iiiiiiiii00nnnnnttttt"),
//INST(&V::LDURSH, "LDURSH", "011110001-0iiiiiiiii00nnnnnttttt"),
//INST(&V::STUR_gen, "STUR", "1-111000000iiiiiiiii00nnnnnttttt"),
//INST(&V::LDUR_gen, "LDUR", "1-111000010iiiiiiiii00nnnnnttttt"),
//INST(&V::LDURSW, "LDURSW", "10111000100iiiiiiiii00nnnnnttttt"),
//INST(&V::PRFUM, "PRFM (unscaled offset)", "11111000100iiiiiiiii00nnnnnttttt"),
//INST(&V::PRFM_imm, "PRFM (immediate)", "1111100110iiiiiiiiiiiinnnnnttttt"),
// Loads and stores - Load/Store register (immediate pre/post-indexed)
//INST(&V::STRB_imm_1, "STRB (immediate)", "00111000000iiiiiiiii01nnnnnttttt"),
//INST(&V::STRB_imm_2, "STRB (immediate)", "00111000000iiiiiiiii11nnnnnttttt"),
//INST(&V::STRB_imm_3, "STRB (immediate)", "0011100100iiiiiiiiiiiinnnnnttttt"),
//INST(&V::LDRB_imm_1, "LDRB (immediate)", "00111000010iiiiiiiii01nnnnnttttt"),
//INST(&V::LDRB_imm_2, "LDRB (immediate)", "00111000010iiiiiiiii11nnnnnttttt"),
//INST(&V::LDRB_imm_3, "LDRB (immediate)", "0011100101iiiiiiiiiiiinnnnnttttt"),
//INST(&V::LDRSB_imm_1, "LDRSB (immediate)", "001110001-0iiiiiiiii01nnnnnttttt"),
//INST(&V::LDRSB_imm_2, "LDRSB (immediate)", "001110001-0iiiiiiiii11nnnnnttttt"),
//INST(&V::LDRSB_imm_3, "LDRSB (immediate)", "001110011-iiiiiiiiiiiinnnnnttttt"),
//INST(&V::STR_imm_fpsimd_1, "STR (immediate, SIMD&FP)", "zz111100-00iiiiiiiii01nnnnnttttt"),
//INST(&V::STR_imm_fpsimd_2, "STR (immediate, SIMD&FP)", "zz111100-00iiiiiiiii11nnnnnttttt"),
//INST(&V::STR_imm_fpsimd_3, "STR (immediate, SIMD&FP)", "zz111101-0iiiiiiiiiiiinnnnnttttt"),
//INST(&V::LDR_imm_fpsimd_1, "LDR (immediate, SIMD&FP)", "zz111100-10iiiiiiiii01nnnnnttttt"),
//INST(&V::LDR_imm_fpsimd_2, "LDR (immediate, SIMD&FP)", "zz111100-10iiiiiiiii11nnnnnttttt"),
//INST(&V::LDR_imm_fpsimd_3, "LDR (immediate, SIMD&FP)", "zz111101-1iiiiiiiiiiiinnnnnttttt"),
//INST(&V::STRH_imm_1, "STRH (immediate)", "01111000000iiiiiiiii01nnnnnttttt"),
//INST(&V::STRH_imm_2, "STRH (immediate)", "01111000000iiiiiiiii11nnnnnttttt"),
//INST(&V::STRH_imm_3, "STRH (immediate)", "0111100100iiiiiiiiiiiinnnnnttttt"),
//INST(&V::LDRH_imm_1, "LDRH (immediate)", "01111000010iiiiiiiii01nnnnnttttt"),
//INST(&V::LDRH_imm_2, "LDRH (immediate)", "01111000010iiiiiiiii11nnnnnttttt"),
//INST(&V::LDRH_imm_3, "LDRH (immediate)", "0111100101iiiiiiiiiiiinnnnnttttt"),
//INST(&V::LDRSH_imm_1, "LDRSH (immediate)", "011110001-0iiiiiiiii01nnnnnttttt"),
//INST(&V::LDRSH_imm_2, "LDRSH (immediate)", "011110001-0iiiiiiiii11nnnnnttttt"),
//INST(&V::LDRSH_imm_3, "LDRSH (immediate)", "011110011-iiiiiiiiiiiinnnnnttttt"),
//INST(&V::STR_imm_gen_1, "STR (immediate)", "1-111000000iiiiiiiii01nnnnnttttt"),
//INST(&V::STR_imm_gen_2, "STR (immediate)", "1-111000000iiiiiiiii11nnnnnttttt"),
//INST(&V::STR_imm_gen_3, "STR (immediate)", "1-11100100iiiiiiiiiiiinnnnnttttt"),
//INST(&V::LDR_imm_gen_1, "LDR (immediate)", "1-111000010iiiiiiiii01nnnnnttttt"),
//INST(&V::LDR_imm_gen_2, "LDR (immediate)", "1-111000010iiiiiiiii11nnnnnttttt"),
//INST(&V::LDR_imm_gen_3, "LDR (immediate)", "1-11100101iiiiiiiiiiiinnnnnttttt"),
//INST(&V::LDRSW_imm_1, "LDRSW (immediate)", "10111000100iiiiiiiii01nnnnnttttt"),
//INST(&V::LDRSW_imm_2, "LDRSW (immediate)", "10111000100iiiiiiiii11nnnnnttttt"),
//INST(&V::LDRSW_imm_3, "LDRSW (immediate)", "1011100110iiiiiiiiiiiinnnnnttttt"),
INST(&V::STRx_LDRx_imm_1, "STRx/LDRx (immediate)", "zz111000oo0iiiiiiiiip1nnnnnttttt"),
INST(&V::STRx_LDRx_imm_2, "STRx/LDRx (immediate)", "zz111001ooiiiiiiiiiiiinnnnnttttt"),
INST(&V::UnallocatedEncoding, "", "111110001-0----------1----------"),
INST(&V::UnallocatedEncoding, "", "10111000110----------1----------"),
INST(&V::UnallocatedEncoding, "", "1111100111----------------------"),
INST(&V::UnallocatedEncoding, "", "1011100111----------------------"),
//INST(&V::STR_imm_fpsimd_1, "STR (immediate, SIMD&FP)", "zz111100-00iiiiiiiiip1nnnnnttttt"),
//INST(&V::STR_imm_fpsimd_2, "STR (immediate, SIMD&FP)", "zz111101-0iiiiiiiiiiiinnnnnttttt"),
//INST(&V::LDR_imm_fpsimd_1, "LDR (immediate, SIMD&FP)", "zz111100-10iiiiiiiiip1nnnnnttttt"),
//INST(&V::LDR_imm_fpsimd_2, "LDR (immediate, SIMD&FP)", "zz111101-1iiiiiiiiiiiinnnnnttttt"),
// Loads and stores - Load/Store register (unprivileged)
//INST(&V::STTRB, "STTRB", "00111000000iiiiiiiii10nnnnnttttt"),