SwitchEmu/dynarmic
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/dynarmic.git synced 2026-03-05 10:16:30 +00:00
Code Issues Packages Projects Releases Wiki Activity

A64: Implement FCVTZS (vector, integer), single/double variant

Browse Source
This commit is contained in:
MerryMage
2018-07-26 12:10:00 +01:00
parent 507bcd8b8b
commit 28b38916a8
2 changed files with 16 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/frontend/A64/decoder/a64.inc
View File

@@ -609,7 +609,7 @@ INST(FABS_2, "FABS (vector)", "0Q001
//INST(FCVTPS_3, "FCVTPS (vector)", "0Q00111011111001101010nnnnnddddd")
//INST(FCVTPS_4, "FCVTPS (vector)", "0Q0011101z100001101010nnnnnddddd")
//INST(FCVTZS_int_3, "FCVTZS (vector, integer)", "0Q00111011111001101110nnnnnddddd")
//INST(FCVTZS_int_4, "FCVTZS (vector, integer)", "0Q0011101z100001101110nnnnnddddd")
INST(FCVTZS_int_4, "FCVTZS (vector, integer)", "0Q0011101z100001101110nnnnnddddd")
//INST(URECPE, "URECPE", "0Q0011101z100001110010nnnnnddddd")
//INST(FRECPE_3, "FRECPE", "0Q00111011111001110110nnnnnddddd")
INST(FRECPE_4, "FRECPE", "0Q0011101z100001110110nnnnnddddd")