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https://git.suyu.dev/suyu/dynarmic.git
synced 2026-03-25 23:18:42 +00:00
Implement thumb16_{SXTH,SXTB,UXTH,UXTB,REV,REV16,REVSH}
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@@ -171,6 +171,31 @@ IR::ValuePtr IREmitter::Not(IR::ValuePtr a) {
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return Inst(IR::Opcode::Not, {a});
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}
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IR::ValuePtr IREmitter::SignExtendHalfToWord(IR::ValuePtr a) {
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return Inst(IR::Opcode::SignExtendHalfToWord, {a});
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}
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IR::ValuePtr IREmitter::SignExtendByteToWord(IR::ValuePtr a) {
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return Inst(IR::Opcode::SignExtendByteToWord, {a});
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}
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IR::ValuePtr IREmitter::ZeroExtendHalfToWord(IR::ValuePtr a) {
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return Inst(IR::Opcode::ZeroExtendHalfToWord, {a});
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}
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IR::ValuePtr IREmitter::ZeroExtendByteToWord(IR::ValuePtr a) {
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return Inst(IR::Opcode::ZeroExtendByteToWord, {a});
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}
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IR::ValuePtr IREmitter::ByteReverseWord(IR::ValuePtr a) {
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return Inst(IR::Opcode::ByteReverseWord, {a});
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}
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IR::ValuePtr IREmitter::ByteReverseHalf(IR::ValuePtr a) {
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return Inst(IR::Opcode::ByteReverseHalf, {a});
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}
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IR::ValuePtr IREmitter::ReadMemory8(IR::ValuePtr vaddr) {
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return Inst(IR::Opcode::ReadMemory8, {vaddr});
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}
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@@ -68,6 +68,12 @@ public:
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IR::ValuePtr Eor(IR::ValuePtr a, IR::ValuePtr b);
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IR::ValuePtr Or(IR::ValuePtr a, IR::ValuePtr b);
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IR::ValuePtr Not(IR::ValuePtr a);
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IR::ValuePtr SignExtendHalfToWord(IR::ValuePtr a);
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IR::ValuePtr SignExtendByteToWord(IR::ValuePtr a);
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IR::ValuePtr ZeroExtendHalfToWord(IR::ValuePtr a);
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IR::ValuePtr ZeroExtendByteToWord(IR::ValuePtr a);
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IR::ValuePtr ByteReverseWord(IR::ValuePtr a);
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IR::ValuePtr ByteReverseHalf(IR::ValuePtr a);
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IR::ValuePtr ReadMemory8(IR::ValuePtr vaddr);
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IR::ValuePtr ReadMemory16(IR::ValuePtr vaddr);
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@@ -39,6 +39,12 @@ OPCODE(And, T::U32, T::U32, T::U32
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OPCODE(Eor, T::U32, T::U32, T::U32 )
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OPCODE(Or, T::U32, T::U32, T::U32 )
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OPCODE(Not, T::U32, T::U32 )
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OPCODE(SignExtendHalfToWord, T::U32, T::U16 )
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OPCODE(SignExtendByteToWord, T::U32, T::U8 )
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OPCODE(ZeroExtendHalfToWord, T::U32, T::U16 )
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OPCODE(ZeroExtendByteToWord, T::U32, T::U8 )
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OPCODE(ByteReverseWord, T::U32, T::U32 )
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OPCODE(ByteReverseHalf, T::U16, T::U16 )
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// Memory access
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OPCODE(ReadMemory8, T::U8, T::U32 )
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