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A64: Implement DUP (element), vector variant
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@@ -9,6 +9,23 @@
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namespace Dynarmic::A64 {
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bool TranslatorVisitor::DUP_elt_2(bool Q, Imm<5> imm5, Vec Vn, Vec Vd) {
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const size_t size = Common::LowestSetBit(imm5.ZeroExtend());
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if (size > 3) return UnallocatedEncoding();
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if (size == 3 && !Q) return ReservedValue();
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const size_t index = imm5.ZeroExtend<size_t>() >> (size + 1);
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const size_t idxdsize = imm5.Bit<4>() ? 128 : 64;
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const size_t esize = 8 << size;
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const size_t datasize = Q ? 128 : 64;
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const IR::U128 operand = V(idxdsize, Vn);
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const IR::UAny element = ir.VectorGetElement(esize, operand, index);
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const IR::U128 result = Q ? ir.VectorBroadcast(esize, element) : ir.VectorBroadcastLower(esize, element);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::DUP_gen(bool Q, Imm<5> imm5, Reg Rn, Vec Vd) {
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const size_t size = Common::LowestSetBit(imm5.ZeroExtend());
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if (size > 3) return UnallocatedEncoding();
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