SwitchEmu/dynarmic
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/dynarmic.git synced 2026-03-26 07:18:43 +00:00
Code Issues Packages Projects Releases Wiki Activity

A64: Implement AESD

Browse Source
This commit is contained in:
Lioncash
2018-02-03 17:20:21 -05:00
committed by MerryMage
parent ccef85dbb7
commit 40614202e7
8 changed files with 92 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/frontend/A64/decoder/a64.inc
View File

@@ -330,7 +330,7 @@ INST(UMSUBL, "UMSUBL", "10011
// Data Processing - FP and SIMD - AES
INST(AESE, "AESE", "0100111000101000010010nnnnnddddd")
//INST(AESD, "AESD", "0100111000101000010110nnnnnddddd")
INST(AESD, "AESD", "0100111000101000010110nnnnnddddd")
INST(AESMC, "AESMC", "0100111000101000011010nnnnnddddd")
INST(AESIMC, "AESIMC", "0100111000101000011110nnnnnddddd")

12
src/frontend/A64/translate/impl/simd_aes.cpp
View File

@@ -8,11 +8,21 @@
namespace Dynarmic::A64 {
bool TranslatorVisitor::AESD(Vec Vn, Vec Vd) {
const IR::U128 operand1 = ir.GetQ(Vd);
const IR::U128 operand2 = ir.GetQ(Vn);
const IR::U128 result = ir.AESDecryptSingleRound(ir.VectorEor(operand1, operand2));
ir.SetQ(Vd, result);
return true;
}
bool TranslatorVisitor::AESE(Vec Vn, Vec Vd) {
const IR::U128 operand1 = ir.GetQ(Vd);
const IR::U128 operand2 = ir.GetQ(Vn);
const IR::U128 result = ir.AESEncrypt(ir.VectorEor(operand1, operand2));
const IR::U128 result = ir.AESEncryptSingleRound(ir.VectorEor(operand1, operand2));
ir.SetQ(Vd, result);
return true;

8
src/frontend/ir/ir_emitter.cpp
View File

@@ -723,8 +723,12 @@ U32 IREmitter::CRC32ISO64(const U32& a, const U64& b) {
return Inst<U32>(Opcode::CRC32ISO64, a, b);
}
U128 IREmitter::AESEncrypt(const U128& a) {
return Inst<U128>(Opcode::AESEncrypt, a);
U128 IREmitter::AESDecryptSingleRound(const U128& a) {
return Inst<U128>(Opcode::AESDecryptSingleRound, a);
}
U128 IREmitter::AESEncryptSingleRound(const U128& a) {
return Inst<U128>(Opcode::AESEncryptSingleRound, a);
}
U128 IREmitter::AESInverseMixColumns(const U128& a) {

3
src/frontend/ir/ir_emitter.h
View File

@@ -197,7 +197,8 @@ public:
U32 CRC32ISO32(const U32& a, const U32& b);
U32 CRC32ISO64(const U32& a, const U64& b);
U128 AESEncrypt(const U128& a);
U128 AESDecryptSingleRound(const U128& a);
U128 AESEncryptSingleRound(const U128& a);
U128 AESInverseMixColumns(const U128& a);
U128 AESMixColumns(const U128& a);

3
src/frontend/ir/opcodes.inc
View File

@@ -181,7 +181,8 @@ OPCODE(CRC32ISO32, T::U32, T::U32, T::U32
OPCODE(CRC32ISO64, T::U32, T::U32, T::U64 )
// AES instructions
OPCODE(AESEncrypt, T::U128, T::U128 )
OPCODE(AESDecryptSingleRound, T::U128, T::U128 )
OPCODE(AESEncryptSingleRound, T::U128, T::U128 )
OPCODE(AESInverseMixColumns, T::U128, T::U128 )
OPCODE(AESMixColumns, T::U128, T::U128 )