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IR: Merge U32 and U64 variants of FP instructions

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This commit is contained in:
MerryMage
2018-02-02 21:55:23 +00:00
parent ed2bedec43
commit 429dc24587
3 changed files with 92 additions and 164 deletions
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114
src/frontend/ir/ir_emitter.cpp
View File

@@ -869,78 +869,78 @@ U128 IREmitter::VectorZeroUpper(const U128& a) {
return Inst<U128>(Opcode::VectorZeroUpper, a);
}
U32 IREmitter::FPAbs32(const U32& a) {
return Inst<U32>(Opcode::FPAbs32, a);
U32U64 IREmitter::FPAbs(const U32U64& a) {
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPAbs32, a);
} else {
return Inst<U64>(Opcode::FPAbs64, a);
}
}
U64 IREmitter::FPAbs64(const U64& a) {
return Inst<U64>(Opcode::FPAbs64, a);
}
U32 IREmitter::FPAdd32(const U32& a, const U32& b, bool fpscr_controlled) {
U32U64 IREmitter::FPAdd(const U32U64& a, const U32U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPAdd32, a, b);
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPAdd32, a, b);
} else {
return Inst<U64>(Opcode::FPAdd64, a, b);
}
}
U64 IREmitter::FPAdd64(const U64& a, const U64& b, bool fpscr_controlled) {
void IREmitter::FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U64>(Opcode::FPAdd64, a, b);
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
Inst(Opcode::FPCompare32, a, b, Imm1(exc_on_qnan));
} else {
Inst(Opcode::FPCompare64, a, b, Imm1(exc_on_qnan));
}
}
void IREmitter::FPCompare32(const U32& a, const U32& b, bool exc_on_qnan, bool fpscr_controlled) {
U32U64 IREmitter::FPDiv(const U32U64& a, const U32U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
Inst(Opcode::FPCompare32, a, b, Imm1(exc_on_qnan));
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPDiv32, a, b);
} else {
return Inst<U64>(Opcode::FPDiv64, a, b);
}
}
void IREmitter::FPCompare64(const U64& a, const U64& b, bool exc_on_qnan, bool fpscr_controlled) {
U32U64 IREmitter::FPMul(const U32U64& a, const U32U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
Inst(Opcode::FPCompare64, a, b, Imm1(exc_on_qnan));
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPMul32, a, b);
} else {
return Inst<U64>(Opcode::FPMul64, a, b);
}
}
U32 IREmitter::FPDiv32(const U32& a, const U32& b, bool fpscr_controlled) {
U32U64 IREmitter::FPNeg(const U32U64& a) {
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPNeg32, a);
} else {
return Inst<U64>(Opcode::FPNeg64, a);
}
}
U32U64 IREmitter::FPSqrt(const U32U64& a) {
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPSqrt32, a);
} else {
return Inst<U64>(Opcode::FPSqrt64, a);
}
}
U32U64 IREmitter::FPSub(const U32U64& a, const U32U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPDiv32, a, b);
}
U64 IREmitter::FPDiv64(const U64& a, const U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U64>(Opcode::FPDiv64, a, b);
}
U32 IREmitter::FPMul32(const U32& a, const U32& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPMul32, a, b);
}
U64 IREmitter::FPMul64(const U64& a, const U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U64>(Opcode::FPMul64, a, b);
}
U32 IREmitter::FPNeg32(const U32& a) {
return Inst<U32>(Opcode::FPNeg32, a);
}
U64 IREmitter::FPNeg64(const U64& a) {
return Inst<U64>(Opcode::FPNeg64, a);
}
U32 IREmitter::FPSqrt32(const U32& a) {
return Inst<U32>(Opcode::FPSqrt32, a);
}
U64 IREmitter::FPSqrt64(const U64& a) {
return Inst<U64>(Opcode::FPSqrt64, a);
}
U32 IREmitter::FPSub32(const U32& a, const U32& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U32>(Opcode::FPSub32, a, b);
}
U64 IREmitter::FPSub64(const U64& a, const U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<U64>(Opcode::FPSub64, a, b);
ASSERT(a.GetType() == b.GetType());
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPSub32, a, b);
} else {
return Inst<U64>(Opcode::FPSub64, a, b);
}
}
U32 IREmitter::FPDoubleToSingle(const U64& a, bool fpscr_controlled) {

24
src/frontend/ir/ir_emitter.h
View File

@@ -229,22 +229,14 @@ public:
U128 VectorPairedAdd64(const U128& a, const U128& b);
U128 VectorZeroUpper(const U128& a);
U32 FPAbs32(const U32& a);
U64 FPAbs64(const U64& a);
U32 FPAdd32(const U32& a, const U32& b, bool fpscr_controlled);
U64 FPAdd64(const U64& a, const U64& b, bool fpscr_controlled);
void FPCompare32(const U32& a, const U32& b, bool exc_on_qnan, bool fpscr_controlled);
void FPCompare64(const U64& a, const U64& b, bool exc_on_qnan, bool fpscr_controlled);
U32 FPDiv32(const U32& a, const U32& b, bool fpscr_controlled);
U64 FPDiv64(const U64& a, const U64& b, bool fpscr_controlled);
U32 FPMul32(const U32& a, const U32& b, bool fpscr_controlled);
U64 FPMul64(const U64& a, const U64& b, bool fpscr_controlled);
U32 FPNeg32(const U32& a);
U64 FPNeg64(const U64& a);
U32 FPSqrt32(const U32& a);
U64 FPSqrt64(const U64& a);
U32 FPSub32(const U32& a, const U32& b, bool fpscr_controlled);
U64 FPSub64(const U64& a, const U64& b, bool fpscr_controlled);
U32U64 FPAbs(const U32U64& a);
U32U64 FPAdd(const U32U64& a, const U32U64& b, bool fpscr_controlled);
void FPCompare(const U32U64& a, const U32U64& b, bool exc_on_qnan, bool fpscr_controlled);
U32U64 FPDiv(const U32U64& a, const U32U64& b, bool fpscr_controlled);
U32U64 FPMul(const U32U64& a, const U32U64& b, bool fpscr_controlled);
U32U64 FPNeg(const U32U64& a);
U32U64 FPSqrt(const U32U64& a);
U32U64 FPSub(const U32U64& a, const U32U64& b, bool fpscr_controlled);
U32 FPDoubleToSingle(const U64& a, bool fpscr_controlled);
U64 FPSingleToDouble(const U32& a, bool fpscr_controlled);
U32 FPSingleToS32(const U32& a, bool round_towards_zero, bool fpscr_controlled);