ir: Add opcodes for performing vector halving subtracts

This commit is contained in:
Lioncash
2018-05-07 12:07:56 -04:00
committed by MerryMage
parent 4f37c0ec5a
commit 44a5f8095a
4 changed files with 120 additions and 0 deletions

View File

@@ -912,6 +912,32 @@ U128 IREmitter::VectorHalvingAddUnsigned(size_t esize, const U128& a, const U128
return {};
}
U128 IREmitter::VectorHalvingSubSigned(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorHalvingSubS8, a, b);
case 16:
return Inst<U128>(Opcode::VectorHalvingSubS16, a, b);
case 32:
return Inst<U128>(Opcode::VectorHalvingSubS32, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorHalvingSubUnsigned(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorHalvingSubU8, a, b);
case 16:
return Inst<U128>(Opcode::VectorHalvingSubU16, a, b);
case 32:
return Inst<U128>(Opcode::VectorHalvingSubU32, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorInterleaveLower(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8: