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reg_alloc: Explicitly specify GPR and XMM order
This allows each backend to modify what registers they want to use and their preferred orderings
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@@ -70,7 +70,7 @@ A64EmitX64::BlockDescriptor A64EmitX64::Emit(IR::Block& block) {
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// Start emitting.
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EmitCondPrelude(block);
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RegAlloc reg_alloc{code, A64JitState::SpillCount, SpillToOpArg<A64JitState>};
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RegAlloc reg_alloc{code, A64JitState::SpillCount, SpillToOpArg<A64JitState>, any_gpr, any_xmm};
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A64EmitContext ctx{conf, reg_alloc, block};
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for (auto iter = block.begin(); iter != block.end(); ++iter) {
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