VFP: Implement VADD.{F32,F64}

src/frontend/translate/translate_arm/vfp2.cpp

@@ -0,0 +1,38 @@
+/* This file is part of the dynarmic project.
+ * Copyright (c) 2016 MerryMage
+ * This software may be used and distributed according to the terms of the GNU
+ * General Public License version 2 or any later version.
+ */
+
+#include "translate_arm.h"
+
+namespace Dynarmic {
+namespace Arm {
+
+static ExtReg ToExtReg(bool sz, size_t base, bool bit) {
+    if (sz) {
+        return static_cast<ExtReg>(static_cast<size_t>(ExtReg::D0) + base + (bit ? 16 : 0));
+    } else {
+        return static_cast<ExtReg>(static_cast<size_t>(ExtReg::S0) + (base << 1) + (bit ? 1 : 0));
+    }
+}
+
+bool ArmTranslatorVisitor::vfp2_VADD(Cond cond, bool D, size_t Vn, size_t Vd, bool sz, bool N, bool M, size_t Vm) {
+    // TODO: if (FSPCR.len || FPSCR.stride) return InterpretThisInstruction();
+    ExtReg d = ToExtReg(sz, Vd, D);
+    ExtReg n = ToExtReg(sz, Vn, N);
+    ExtReg m = ToExtReg(sz, Vm, M);
+    // VADD.{F32,F64} <{S,D}d>, <{S,D}n>, <{S,D}m>
+    if (ConditionPassed(cond)) {
+        auto a = ir.GetExtendedRegister(n);
+        auto b = ir.GetExtendedRegister(m);
+        auto result = sz
+                      ? ir.FPAdd64(a, b, true)
+                      : ir.FPAdd32(a, b, true);
+        ir.SetExtendedRegister(d, result);
+    }
+    return true;
+}
+
+} // namespace Arm
+} // namespace Dynarmic