Add .clang-format file

Using clang-format version 12.0.0
This commit is contained in:
MerryMage
2021-05-22 14:51:20 +01:00
parent 51b155df92
commit 53493b2024
315 changed files with 3178 additions and 2660 deletions

View File

@@ -79,8 +79,8 @@ u32 GenRandomArmInst(u32 pc, bool is_last_inst) {
static const struct InstructionGeneratorInfo {
std::vector<InstructionGenerator> generators;
std::vector<InstructionGenerator> invalid;
} instructions = []{
const std::vector<std::tuple<std::string, const char*>> list {
} instructions = [] {
const std::vector<std::tuple<std::string, const char*>> list{
#define INST(fn, name, bitstring) {#fn, bitstring},
#include "dynarmic/frontend/A32/decoder/arm.inc"
#include "dynarmic/frontend/A32/decoder/asimd.inc"
@@ -92,7 +92,7 @@ u32 GenRandomArmInst(u32 pc, bool is_last_inst) {
std::vector<InstructionGenerator> invalid;
// List of instructions not to test
static constexpr std::array do_not_test {
static constexpr std::array do_not_test{
// Translating load/stores
"arm_LDRBT", "arm_LDRBT", "arm_LDRHT", "arm_LDRHT", "arm_LDRSBT", "arm_LDRSBT", "arm_LDRSHT", "arm_LDRSHT", "arm_LDRT", "arm_LDRT",
"arm_STRBT", "arm_STRBT", "arm_STRHT", "arm_STRHT", "arm_STRT", "arm_STRT",
@@ -117,9 +117,9 @@ u32 GenRandomArmInst(u32 pc, bool is_last_inst) {
// FPSCR is inaccurate
"vfp_VMRS",
// Incorrect Unicorn implementations
"asimd_VRECPS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
"asimd_VRSQRTS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
"vfp_VCVT_from_fixed", // Unicorn does not do round-to-nearest-even for this instruction correctly.
"asimd_VRECPS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
"asimd_VRSQRTS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
"vfp_VCVT_from_fixed", // Unicorn does not do round-to-nearest-even for this instruction correctly.
};
for (const auto& [fn, bitstring] : list) {
@@ -150,21 +150,21 @@ std::vector<u16> GenRandomThumbInst(u32 pc, bool is_last_inst, A32::ITState it_s
static const struct InstructionGeneratorInfo {
std::vector<InstructionGenerator> generators;
std::vector<InstructionGenerator> invalid;
} instructions = []{
const std::vector<std::tuple<std::string, const char*>> list {
} instructions = [] {
const std::vector<std::tuple<std::string, const char*>> list{
#define INST(fn, name, bitstring) {#fn, bitstring},
#include "dynarmic/frontend/A32/decoder/thumb16.inc"
#include "dynarmic/frontend/A32/decoder/thumb32.inc"
#undef INST
};
const std::vector<std::tuple<std::string, const char*>> vfp_list {
const std::vector<std::tuple<std::string, const char*>> vfp_list{
#define INST(fn, name, bitstring) {#fn, bitstring},
#include "dynarmic/frontend/A32/decoder/vfp.inc"
#undef INST
};
const std::vector<std::tuple<std::string, const char*>> asimd_list {
const std::vector<std::tuple<std::string, const char*>> asimd_list{
#define INST(fn, name, bitstring) {#fn, bitstring},
#include "dynarmic/frontend/A32/decoder/asimd.inc"
#undef INST
@@ -174,7 +174,7 @@ std::vector<u16> GenRandomThumbInst(u32 pc, bool is_last_inst, A32::ITState it_s
std::vector<InstructionGenerator> invalid;
// List of instructions not to test
static constexpr std::array do_not_test {
static constexpr std::array do_not_test{
"thumb16_BKPT",
"thumb16_IT",
"thumb16_SETEND",
@@ -198,11 +198,17 @@ std::vector<u16> GenRandomThumbInst(u32 pc, bool is_last_inst, A32::ITState it_s
// Unicorn has incorrect implementation (incorrect rounding and unsets CPSR.T??)
"vfp_VCVT_to_fixed",
"vfp_VCVT_from_fixed",
"asimd_VRECPS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
"asimd_VRSQRTS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
"asimd_VRECPS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
"asimd_VRSQRTS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
// Coprocessor
"thumb32_CDP", "thumb32_LDC", "thumb32_MCR", "thumb32_MCRR", "thumb32_MRC", "thumb32_MRRC", "thumb32_STC",
"thumb32_CDP",
"thumb32_LDC",
"thumb32_MCR",
"thumb32_MCRR",
"thumb32_MRC",
"thumb32_MRRC",
"thumb32_STC",
};
for (const auto& [fn, bitstring] : list) {
@@ -250,13 +256,13 @@ std::vector<u16> GenRandomThumbInst(u32 pc, bool is_last_inst, A32::ITState it_s
if (ShouldTestInst(is_four_bytes ? Common::SwapHalves32(inst) : inst, pc, true, is_last_inst, it_state)) {
if (is_four_bytes)
return { static_cast<u16>(inst >> 16), static_cast<u16>(inst) };
return { static_cast<u16>(inst) };
return {static_cast<u16>(inst >> 16), static_cast<u16>(inst)};
return {static_cast<u16>(inst)};
}
}
}
template <typename TestEnv>
template<typename TestEnv>
Dynarmic::A32::UserConfig GetUserConfig(TestEnv& testenv) {
Dynarmic::A32::UserConfig user_config;
user_config.optimizations &= ~OptimizationFlag::FastDispatch;
@@ -265,7 +271,7 @@ Dynarmic::A32::UserConfig GetUserConfig(TestEnv& testenv) {
return user_config;
}
template <typename TestEnv>
template<typename TestEnv>
static void RunTestInstance(Dynarmic::A32::Jit& jit,
A32Unicorn<TestEnv>& uni,
TestEnv& jit_env,
@@ -309,7 +315,7 @@ static void RunTestInstance(Dynarmic::A32::Jit& jit,
jit_env.ticks_left = ticks_left;
jit.Run();
uni_env.ticks_left = instructions.size(); // Unicorn counts thumb instructions weirdly.
uni_env.ticks_left = instructions.size(); // Unicorn counts thumb instructions weirdly.
uni.Run();
SCOPE_FAIL {
@@ -394,7 +400,7 @@ static void RunTestInstance(Dynarmic::A32::Jit& jit,
REQUIRE(uni_env.modified_memory == jit_env.modified_memory);
REQUIRE(uni_env.interrupts.empty());
}
} // Anonymous namespace
} // Anonymous namespace
TEST_CASE("A32: Single random arm instruction", "[arm]") {
ArmTestEnv jit_env{};
@@ -574,7 +580,7 @@ TEST_CASE("A32: Test thumb IT instruction", "[thumb]") {
}
// Emit IT instruction
A32::ITState it_state = [&]{
A32::ITState it_state = [&] {
while (true) {
const u16 imm8 = RandInt<u16>(0, 0xFF);
if (Common::Bits<0, 3>(imm8) == 0b0000 || Common::Bits<4, 7>(imm8) == 0b1111 || (Common::Bits<4, 7>(imm8) == 0b1110 && Common::BitCount(Common::Bits<0, 3>(imm8)) != 1)) {