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https://git.suyu.dev/suyu/dynarmic.git
synced 2026-03-26 14:52:57 +00:00
ir_emitter: Remove overloads
Having overloads made explicit casting necesssary for these functions when using types like UAny.
This commit is contained in:
@@ -217,14 +217,6 @@ U32U64 IREmitter::AddWithCarry(const U32U64& a, const U32U64& b, const U1& carry
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}
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}
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U32 IREmitter::Add(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::Add32, a, b, Imm1(0));
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}
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U64 IREmitter::Add(const U64& a, const U64& b) {
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return Inst<U64>(Opcode::Add64, a, b, Imm1(0));
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}
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U32U64 IREmitter::Add(const U32U64& a, const U32U64& b) {
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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@@ -251,14 +243,6 @@ U32U64 IREmitter::SubWithCarry(const U32U64& a, const U32U64& b, const U1& carry
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}
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}
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U32 IREmitter::Sub(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::Sub32, a, b, Imm1(1));
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}
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U64 IREmitter::Sub(const U64& a, const U64& b) {
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return Inst<U64>(Opcode::Sub64, a, b, Imm1(1));
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}
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U32U64 IREmitter::Sub(const U32U64& a, const U32U64& b) {
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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@@ -268,14 +252,6 @@ U32U64 IREmitter::Sub(const U32U64& a, const U32U64& b) {
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}
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}
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U32 IREmitter::Mul(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::Mul32, a, b);
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}
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U64 IREmitter::Mul(const U64& a, const U64& b) {
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return Inst<U64>(Opcode::Mul64, a, b);
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}
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U32U64 IREmitter::Mul(const U32U64& a, const U32U64& b) {
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if (a.GetType() == Type::U32) {
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return Inst<U32>(Opcode::Mul32, a, b);
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@@ -292,14 +268,6 @@ U64 IREmitter::SignedMultiplyHigh(const U64& a, const U64& b) {
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return Inst<U64>(Opcode::SignedMultiplyHigh64, a, b);
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}
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U32 IREmitter::UnsignedDiv(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::UnsignedDiv32, a, b);
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}
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U64 IREmitter::UnsignedDiv(const U64& a, const U64& b) {
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return Inst<U64>(Opcode::UnsignedDiv64, a, b);
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}
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U32U64 IREmitter::UnsignedDiv(const U32U64& a, const U32U64& b) {
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if (a.GetType() == Type::U32) {
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return Inst<U32>(Opcode::UnsignedDiv32, a, b);
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@@ -308,14 +276,6 @@ U32U64 IREmitter::UnsignedDiv(const U32U64& a, const U32U64& b) {
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return Inst<U64>(Opcode::UnsignedDiv64, a, b);
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}
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U32 IREmitter::SignedDiv(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::SignedDiv32, a, b);
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}
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U64 IREmitter::SignedDiv(const U64& a, const U64& b) {
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return Inst<U64>(Opcode::SignedDiv64, a, b);
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}
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U32U64 IREmitter::SignedDiv(const U32U64& a, const U32U64& b) {
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if (a.GetType() == Type::U32) {
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return Inst<U32>(Opcode::SignedDiv32, a, b);
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@@ -324,10 +284,6 @@ U32U64 IREmitter::SignedDiv(const U32U64& a, const U32U64& b) {
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return Inst<U64>(Opcode::SignedDiv64, a, b);
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}
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U32 IREmitter::And(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::And32, a, b);
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}
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U32U64 IREmitter::And(const U32U64& a, const U32U64& b) {
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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@@ -337,10 +293,6 @@ U32U64 IREmitter::And(const U32U64& a, const U32U64& b) {
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}
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}
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U32 IREmitter::Eor(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::Eor32, a, b);
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}
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U32U64 IREmitter::Eor(const U32U64& a, const U32U64& b) {
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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@@ -350,10 +302,6 @@ U32U64 IREmitter::Eor(const U32U64& a, const U32U64& b) {
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}
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}
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U32 IREmitter::Or(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::Or32, a, b);
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}
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U32U64 IREmitter::Or(const U32U64& a, const U32U64& b) {
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ASSERT(a.GetType() == b.GetType());
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if (a.GetType() == Type::U32) {
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@@ -363,10 +311,6 @@ U32U64 IREmitter::Or(const U32U64& a, const U32U64& b) {
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}
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}
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U32 IREmitter::Not(const U32& a) {
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return Inst<U32>(Opcode::Not32, a);
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}
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U32U64 IREmitter::Not(const U32U64& a) {
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if (a.GetType() == Type::U32) {
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return Inst<U32>(Opcode::Not32, a);
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@@ -489,14 +433,6 @@ U64 IREmitter::ByteReverseDual(const U64& a) {
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return Inst<U64>(Opcode::ByteReverseDual, a);
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}
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U32 IREmitter::CountLeadingZeros(const U32& a) {
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return Inst<U32>(Opcode::CountLeadingZeros32, a);
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}
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U64 IREmitter::CountLeadingZeros(const U64& a) {
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return Inst<U64>(Opcode::CountLeadingZeros64, a);
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}
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U32U64 IREmitter::CountLeadingZeros(const U32U64& a) {
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if (a.GetType() == IR::Type::U32) {
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return Inst<U32>(Opcode::CountLeadingZeros32, a);
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@@ -505,14 +441,6 @@ U32U64 IREmitter::CountLeadingZeros(const U32U64& a) {
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return Inst<U64>(Opcode::CountLeadingZeros64, a);
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}
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U32 IREmitter::ExtractRegister(const U32& a, const U32& b, const U8& lsb) {
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return Inst<U32>(Opcode::ExtractRegister32, a, b, lsb);
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}
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U64 IREmitter::ExtractRegister(const U64& a, const U64& b, const U8& lsb) {
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return Inst<U64>(Opcode::ExtractRegister64, a, b, lsb);
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}
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U32U64 IREmitter::ExtractRegister(const U32U64& a, const U32U64& b, const U8& lsb) {
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if (a.GetType() == IR::Type::U32) {
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return Inst<U32>(Opcode::ExtractRegister32, a, b, lsb);
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