A64: Implement load/store single structure instructions

Implements LD{1, 2, 3, 4}, LD{1, 2, 3, 4}R, and ST{1, 2, 3, 4} single
structure variants.
This commit is contained in:
Lioncash
2018-07-04 14:05:53 -04:00
committed by MerryMage
parent b6e223fc58
commit 593eca7fb1
4 changed files with 256 additions and 40 deletions

View File

@@ -109,30 +109,30 @@ INST(LDx_mult_1, "LDx (multiple structures)", "0Q001
INST(LDx_mult_2, "LDx (multiple structures)", "0Q001100110mmmmmoooozznnnnnttttt")
// Loads and stores - Advanced SIMD Load/Store single structures
//INST(ST1_sngl_1, "ST1 (single structure)", "0Q00110100000000--0Szznnnnnttttt")
//INST(ST1_sngl_2, "ST1 (single structure)", "0Q001101100mmmmm--0Szznnnnnttttt")
//INST(ST3_sngl_1, "ST3 (single structure)", "0Q00110100000000--1Szznnnnnttttt")
//INST(ST3_sngl_2, "ST3 (single structure)", "0Q001101100mmmmm--1Szznnnnnttttt")
//INST(ST2_sngl_1, "ST2 (single structure)", "0Q00110100100000--0Szznnnnnttttt")
//INST(ST2_sngl_2, "ST2 (single structure)", "0Q001101101mmmmm--0Szznnnnnttttt")
//INST(ST4_sngl_1, "ST4 (single structure)", "0Q00110100100000--1Szznnnnnttttt")
//INST(ST4_sngl_2, "ST4 (single structure)", "0Q001101101mmmmm--1Szznnnnnttttt")
//INST(LD1_sngl_1, "LD1 (single structure)", "0Q00110101000000--0Szznnnnnttttt")
//INST(LD1_sngl_2, "LD1 (single structure)", "0Q001101110mmmmm--0Szznnnnnttttt")
//INST(LD3_sngl_1, "LD3 (single structure)", "0Q00110101000000--1Szznnnnnttttt")
//INST(LD3_sngl_2, "LD3 (single structure)", "0Q001101110mmmmm--1Szznnnnnttttt")
//INST(LD1R_1, "LD1R", "0Q001101010000001100zznnnnnttttt")
//INST(LD1R_2, "LD1R", "0Q001101110mmmmm1100zznnnnnttttt")
//INST(LD3R_1, "LD3R", "0Q001101010000001110zznnnnnttttt")
//INST(LD3R_2, "LD3R", "0Q001101110mmmmm1110zznnnnnttttt")
//INST(LD2_sngl_1, "LD2 (single structure)", "0Q00110101100000--0Szznnnnnttttt")
//INST(LD2_sngl_2, "LD2 (single structure)", "0Q001101111mmmmm--0Szznnnnnttttt")
//INST(LD4_sngl_1, "LD4 (single structure)", "0Q00110101100000--1Szznnnnnttttt")
//INST(LD4_sngl_2, "LD4 (single structure)", "0Q001101111mmmmm--1Szznnnnnttttt")
//INST(LD2R_1, "LD2R", "0Q001101011000001100zznnnnnttttt")
//INST(LD2R_2, "LD2R", "0Q001101111mmmmm1100zznnnnnttttt")
//INST(LD4R_1, "LD4R", "0Q001101011000001110zznnnnnttttt")
//INST(LD4R_2, "LD4R", "0Q001101111mmmmm1110zznnnnnttttt")
INST(ST1_sngl_1, "ST1 (single structure)", "0Q00110100000000oo0Szznnnnnttttt")
INST(ST1_sngl_2, "ST1 (single structure)", "0Q001101100mmmmmoo0Szznnnnnttttt")
INST(ST3_sngl_1, "ST3 (single structure)", "0Q00110100000000oo1Szznnnnnttttt")
INST(ST3_sngl_2, "ST3 (single structure)", "0Q001101100mmmmmoo1Szznnnnnttttt")
INST(ST2_sngl_1, "ST2 (single structure)", "0Q00110100100000oo0Szznnnnnttttt")
INST(ST2_sngl_2, "ST2 (single structure)", "0Q001101101mmmmmoo0Szznnnnnttttt")
INST(ST4_sngl_1, "ST4 (single structure)", "0Q00110100100000oo1Szznnnnnttttt")
INST(ST4_sngl_2, "ST4 (single structure)", "0Q001101101mmmmmoo1Szznnnnnttttt")
INST(LD1_sngl_1, "LD1 (single structure)", "0Q00110101000000oo0Szznnnnnttttt")
INST(LD1_sngl_2, "LD1 (single structure)", "0Q001101110mmmmmoo0Szznnnnnttttt")
INST(LD3_sngl_1, "LD3 (single structure)", "0Q00110101000000oo1Szznnnnnttttt")
INST(LD3_sngl_2, "LD3 (single structure)", "0Q001101110mmmmmoo1Szznnnnnttttt")
INST(LD1R_1, "LD1R", "0Q001101010000001100zznnnnnttttt")
INST(LD1R_2, "LD1R", "0Q001101110mmmmm1100zznnnnnttttt")
INST(LD3R_1, "LD3R", "0Q001101010000001110zznnnnnttttt")
INST(LD3R_2, "LD3R", "0Q001101110mmmmm1110zznnnnnttttt")
INST(LD2_sngl_1, "LD2 (single structure)", "0Q00110101100000oo0Szznnnnnttttt")
INST(LD2_sngl_2, "LD2 (single structure)", "0Q001101111mmmmmoo0Szznnnnnttttt")
INST(LD4_sngl_1, "LD4 (single structure)", "0Q00110101100000oo1Szznnnnnttttt")
INST(LD4_sngl_2, "LD4 (single structure)", "0Q001101111mmmmmoo1Szznnnnnttttt")
INST(LD2R_1, "LD2R", "0Q001101011000001100zznnnnnttttt")
INST(LD2R_2, "LD2R", "0Q001101111mmmmm1100zznnnnnttttt")
INST(LD4R_1, "LD4R", "0Q001101011000001110zznnnnnttttt")
INST(LD4R_2, "LD4R", "0Q001101111mmmmm1110zznnnnnttttt")
// Loads and stores - Load/Store Exclusive
INST(STXR, "STXRB, STXRH, STXR", "zz001000000sssss011111nnnnnttttt")