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IR: Simplify types. F32 -> U32, F64 -> U64, F128 -> U128

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ARM's Architecture Specification Language doesn't distinguish between floats and integers
as much as we do. This makes some things difficult to implement. Since our register
allocator is now capable of allocating values to XMMs and GPRs as necessary, the
Transfer IR instructions are no longer necessary as they used to be and they can be
removed.
This commit is contained in:
MerryMage
2018-01-19 01:09:46 +00:00
parent 9a812b0c61
commit 5eb0bdecdf
10 changed files with 150 additions and 226 deletions
Download Patch File Download Diff File Expand all files Collapse all files

116
src/frontend/ir/ir_emitter.cpp
View File

@@ -604,144 +604,128 @@ U32 IREmitter::PackedSelect(const U32& ge, const U32& a, const U32& b) {
return Inst<U32>(Opcode::PackedSelect, ge, a, b);
}
F32 IREmitter::TransferToFP32(const U32& a) {
return Inst<F32>(Opcode::TransferToFP32, a);
U32 IREmitter::FPAbs32(const U32& a) {
return Inst<U32>(Opcode::FPAbs32, a);
}
F64 IREmitter::TransferToFP64(const U64& a) {
return Inst<F64>(Opcode::TransferToFP64, a);
U64 IREmitter::FPAbs64(const U64& a) {
return Inst<U64>(Opcode::FPAbs64, a);
}
U32 IREmitter::TransferFromFP32(const F32& a) {
return Inst<U32>(Opcode::TransferFromFP32, a);
}
U64 IREmitter::TransferFromFP64(const F64& a) {
return Inst<U64>(Opcode::TransferFromFP64, a);
}
F32 IREmitter::FPAbs32(const F32& a) {
return Inst<F32>(Opcode::FPAbs32, a);
}
F64 IREmitter::FPAbs64(const F64& a) {
return Inst<F64>(Opcode::FPAbs64, a);
}
F32 IREmitter::FPAdd32(const F32& a, const F32& b, bool fpscr_controlled) {
U32 IREmitter::FPAdd32(const U32& a, const U32& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPAdd32, a, b);
return Inst<U32>(Opcode::FPAdd32, a, b);
}
F64 IREmitter::FPAdd64(const F64& a, const F64& b, bool fpscr_controlled) {
U64 IREmitter::FPAdd64(const U64& a, const U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F64>(Opcode::FPAdd64, a, b);
return Inst<U64>(Opcode::FPAdd64, a, b);
}
void IREmitter::FPCompare32(const F32& a, const F32& b, bool exc_on_qnan, bool fpscr_controlled) {
void IREmitter::FPCompare32(const U32& a, const U32& b, bool exc_on_qnan, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
Inst(Opcode::FPCompare32, a, b, Imm1(exc_on_qnan));
}
void IREmitter::FPCompare64(const F64& a, const F64& b, bool exc_on_qnan, bool fpscr_controlled) {
void IREmitter::FPCompare64(const U64& a, const U64& b, bool exc_on_qnan, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
Inst(Opcode::FPCompare64, a, b, Imm1(exc_on_qnan));
}
F32 IREmitter::FPDiv32(const F32& a, const F32& b, bool fpscr_controlled) {
U32 IREmitter::FPDiv32(const U32& a, const U32& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPDiv32, a, b);
return Inst<U32>(Opcode::FPDiv32, a, b);
}
F64 IREmitter::FPDiv64(const F64& a, const F64& b, bool fpscr_controlled) {
U64 IREmitter::FPDiv64(const U64& a, const U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F64>(Opcode::FPDiv64, a, b);
return Inst<U64>(Opcode::FPDiv64, a, b);
}
F32 IREmitter::FPMul32(const F32& a, const F32& b, bool fpscr_controlled) {
U32 IREmitter::FPMul32(const U32& a, const U32& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPMul32, a, b);
return Inst<U32>(Opcode::FPMul32, a, b);
}
F64 IREmitter::FPMul64(const F64& a, const F64& b, bool fpscr_controlled) {
U64 IREmitter::FPMul64(const U64& a, const U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F64>(Opcode::FPMul64, a, b);
return Inst<U64>(Opcode::FPMul64, a, b);
}
F32 IREmitter::FPNeg32(const F32& a) {
return Inst<F32>(Opcode::FPNeg32, a);
U32 IREmitter::FPNeg32(const U32& a) {
return Inst<U32>(Opcode::FPNeg32, a);
}
F64 IREmitter::FPNeg64(const F64& a) {
return Inst<F64>(Opcode::FPNeg64, a);
U64 IREmitter::FPNeg64(const U64& a) {
return Inst<U64>(Opcode::FPNeg64, a);
}
F32 IREmitter::FPSqrt32(const F32& a) {
return Inst<F32>(Opcode::FPSqrt32, a);
U32 IREmitter::FPSqrt32(const U32& a) {
return Inst<U32>(Opcode::FPSqrt32, a);
}
F64 IREmitter::FPSqrt64(const F64& a) {
return Inst<F64>(Opcode::FPSqrt64, a);
U64 IREmitter::FPSqrt64(const U64& a) {
return Inst<U64>(Opcode::FPSqrt64, a);
}
F32 IREmitter::FPSub32(const F32& a, const F32& b, bool fpscr_controlled) {
U32 IREmitter::FPSub32(const U32& a, const U32& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPSub32, a, b);
return Inst<U32>(Opcode::FPSub32, a, b);
}
F64 IREmitter::FPSub64(const F64& a, const F64& b, bool fpscr_controlled) {
U64 IREmitter::FPSub64(const U64& a, const U64& b, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F64>(Opcode::FPSub64, a, b);
return Inst<U64>(Opcode::FPSub64, a, b);
}
F32 IREmitter::FPDoubleToSingle(const F64& a, bool fpscr_controlled) {
U32 IREmitter::FPDoubleToSingle(const U64& a, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPDoubleToSingle, a);
return Inst<U32>(Opcode::FPDoubleToSingle, a);
}
F64 IREmitter::FPSingleToDouble(const F32& a, bool fpscr_controlled) {
U64 IREmitter::FPSingleToDouble(const U32& a, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F64>(Opcode::FPSingleToDouble, a);
return Inst<U64>(Opcode::FPSingleToDouble, a);
}
F32 IREmitter::FPSingleToS32(const F32& a, bool round_towards_zero, bool fpscr_controlled) {
U32 IREmitter::FPSingleToS32(const U32& a, bool round_towards_zero, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPSingleToS32, a, Imm1(round_towards_zero));
return Inst<U32>(Opcode::FPSingleToS32, a, Imm1(round_towards_zero));
}
F32 IREmitter::FPSingleToU32(const F32& a, bool round_towards_zero, bool fpscr_controlled) {
U32 IREmitter::FPSingleToU32(const U32& a, bool round_towards_zero, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPSingleToU32, a, Imm1(round_towards_zero));
return Inst<U32>(Opcode::FPSingleToU32, a, Imm1(round_towards_zero));
}
F32 IREmitter::FPDoubleToS32(const F32& a, bool round_towards_zero, bool fpscr_controlled) {
U32 IREmitter::FPDoubleToS32(const U32& a, bool round_towards_zero, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPDoubleToS32, a, Imm1(round_towards_zero));
return Inst<U32>(Opcode::FPDoubleToS32, a, Imm1(round_towards_zero));
}
F32 IREmitter::FPDoubleToU32(const F32& a, bool round_towards_zero, bool fpscr_controlled) {
U32 IREmitter::FPDoubleToU32(const U32& a, bool round_towards_zero, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPDoubleToU32, a, Imm1(round_towards_zero));
return Inst<U32>(Opcode::FPDoubleToU32, a, Imm1(round_towards_zero));
}
F32 IREmitter::FPS32ToSingle(const F32& a, bool round_to_nearest, bool fpscr_controlled) {
U32 IREmitter::FPS32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPS32ToSingle, a, Imm1(round_to_nearest));
return Inst<U32>(Opcode::FPS32ToSingle, a, Imm1(round_to_nearest));
}
F32 IREmitter::FPU32ToSingle(const F32& a, bool round_to_nearest, bool fpscr_controlled) {
U32 IREmitter::FPU32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F32>(Opcode::FPU32ToSingle, a, Imm1(round_to_nearest));
return Inst<U32>(Opcode::FPU32ToSingle, a, Imm1(round_to_nearest));
}
F64 IREmitter::FPS32ToDouble(const F32& a, bool round_to_nearest, bool fpscr_controlled) {
U64 IREmitter::FPS32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F64>(Opcode::FPS32ToDouble, a, Imm1(round_to_nearest));
return Inst<U64>(Opcode::FPS32ToDouble, a, Imm1(round_to_nearest));
}
F64 IREmitter::FPU32ToDouble(const F32& a, bool round_to_nearest, bool fpscr_controlled) {
U64 IREmitter::FPU32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled) {
ASSERT(fpscr_controlled);
return Inst<F64>(Opcode::FPU32ToDouble, a, Imm1(round_to_nearest));
return Inst<U64>(Opcode::FPU32ToDouble, a, Imm1(round_to_nearest));
}
void IREmitter::Breakpoint() {

56
src/frontend/ir/ir_emitter.h
View File

@@ -177,36 +177,32 @@ public:
U32 PackedAbsDiffSumS8(const U32& a, const U32& b);
U32 PackedSelect(const U32& ge, const U32& a, const U32& b);
F32 TransferToFP32(const U32& a);
F64 TransferToFP64(const U64& a);
U32 TransferFromFP32(const F32& a);
U64 TransferFromFP64(const F64& a);
F32 FPAbs32(const F32& a);
F64 FPAbs64(const F64& a);
F32 FPAdd32(const F32& a, const F32& b, bool fpscr_controlled);
F64 FPAdd64(const F64& a, const F64& b, bool fpscr_controlled);
void FPCompare32(const F32& a, const F32& b, bool exc_on_qnan, bool fpscr_controlled);
void FPCompare64(const F64& a, const F64& b, bool exc_on_qnan, bool fpscr_controlled);
F32 FPDiv32(const F32& a, const F32& b, bool fpscr_controlled);
F64 FPDiv64(const F64& a, const F64& b, bool fpscr_controlled);
F32 FPMul32(const F32& a, const F32& b, bool fpscr_controlled);
F64 FPMul64(const F64& a, const F64& b, bool fpscr_controlled);
F32 FPNeg32(const F32& a);
F64 FPNeg64(const F64& a);
F32 FPSqrt32(const F32& a);
F64 FPSqrt64(const F64& a);
F32 FPSub32(const F32& a, const F32& b, bool fpscr_controlled);
F64 FPSub64(const F64& a, const F64& b, bool fpscr_controlled);
F32 FPDoubleToSingle(const F64& a, bool fpscr_controlled);
F64 FPSingleToDouble(const F32& a, bool fpscr_controlled);
F32 FPSingleToS32(const F32& a, bool round_towards_zero, bool fpscr_controlled);
F32 FPSingleToU32(const F32& a, bool round_towards_zero, bool fpscr_controlled);
F32 FPDoubleToS32(const F32& a, bool round_towards_zero, bool fpscr_controlled);
F32 FPDoubleToU32(const F32& a, bool round_towards_zero, bool fpscr_controlled);
F32 FPS32ToSingle(const F32& a, bool round_to_nearest, bool fpscr_controlled);
F32 FPU32ToSingle(const F32& a, bool round_to_nearest, bool fpscr_controlled);
F64 FPS32ToDouble(const F32& a, bool round_to_nearest, bool fpscr_controlled);
F64 FPU32ToDouble(const F32& a, bool round_to_nearest, bool fpscr_controlled);
U32 FPAbs32(const U32& a);
U64 FPAbs64(const U64& a);
U32 FPAdd32(const U32& a, const U32& b, bool fpscr_controlled);
U64 FPAdd64(const U64& a, const U64& b, bool fpscr_controlled);
void FPCompare32(const U32& a, const U32& b, bool exc_on_qnan, bool fpscr_controlled);
void FPCompare64(const U64& a, const U64& b, bool exc_on_qnan, bool fpscr_controlled);
U32 FPDiv32(const U32& a, const U32& b, bool fpscr_controlled);
U64 FPDiv64(const U64& a, const U64& b, bool fpscr_controlled);
U32 FPMul32(const U32& a, const U32& b, bool fpscr_controlled);
U64 FPMul64(const U64& a, const U64& b, bool fpscr_controlled);
U32 FPNeg32(const U32& a);
U64 FPNeg64(const U64& a);
U32 FPSqrt32(const U32& a);
U64 FPSqrt64(const U64& a);
U32 FPSub32(const U32& a, const U32& b, bool fpscr_controlled);
U64 FPSub64(const U64& a, const U64& b, bool fpscr_controlled);
U32 FPDoubleToSingle(const U64& a, bool fpscr_controlled);
U64 FPSingleToDouble(const U32& a, bool fpscr_controlled);
U32 FPSingleToS32(const U32& a, bool round_towards_zero, bool fpscr_controlled);
U32 FPSingleToU32(const U32& a, bool round_towards_zero, bool fpscr_controlled);
U32 FPDoubleToS32(const U32& a, bool round_towards_zero, bool fpscr_controlled);
U32 FPDoubleToU32(const U32& a, bool round_towards_zero, bool fpscr_controlled);
U32 FPS32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled);
U32 FPU32ToSingle(const U32& a, bool round_to_nearest, bool fpscr_controlled);
U64 FPS32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled);
U64 FPU32ToDouble(const U32& a, bool round_to_nearest, bool fpscr_controlled);
void Breakpoint();

10
src/frontend/ir/opcodes.h
View File

@@ -43,12 +43,10 @@ enum class Type {
U16 = 1 << 7,
U32 = 1 << 8,
U64 = 1 << 9,
F32 = 1 << 10,
F64 = 1 << 11,
F128 = 1 << 12,
CoprocInfo = 1 << 13,
NZCVFlags = 1 << 14,
Cond = 1 << 15,
U128 = 1 << 10,
CoprocInfo = 1 << 11,
NZCVFlags = 1 << 12,
Cond = 1 << 13,
};
constexpr Type operator|(Type a, Type b) {

64
src/frontend/ir/opcodes.inc
View File

@@ -6,11 +6,11 @@ OPCODE(Breakpoint, T::Void,
// A32 Context getters/setters
A32OPC(GetRegister, T::U32, T::A32Reg )
A32OPC(GetExtendedRegister32, T::F32, T::A32ExtReg )
A32OPC(GetExtendedRegister64, T::F64, T::A32ExtReg )
A32OPC(GetExtendedRegister32, T::U32, T::A32ExtReg )
A32OPC(GetExtendedRegister64, T::U64, T::A32ExtReg )
A32OPC(SetRegister, T::Void, T::A32Reg, T::U32 )
A32OPC(SetExtendedRegister32, T::Void, T::A32ExtReg, T::F32 )
A32OPC(SetExtendedRegister64, T::Void, T::A32ExtReg, T::F64 )
A32OPC(SetExtendedRegister32, T::Void, T::A32ExtReg, T::U32 )
A32OPC(SetExtendedRegister64, T::Void, T::A32ExtReg, T::U64 )
A32OPC(GetCpsr, T::U32, )
A32OPC(SetCpsr, T::Void, T::U32 )
A32OPC(SetCpsrNZCV, T::Void, T::U32 )
@@ -150,38 +150,34 @@ OPCODE(PackedAbsDiffSumS8, T::U32, T::U32, T::U32
OPCODE(PackedSelect, T::U32, T::U32, T::U32, T::U32 )
// Floating-point operations
OPCODE(TransferToFP32, T::F32, T::U32 )
OPCODE(TransferToFP64, T::F64, T::U64 )
OPCODE(TransferFromFP32, T::U32, T::F32 )
OPCODE(TransferFromFP64, T::U64, T::F64 )
OPCODE(FPAbs32, T::F32, T::F32 )
OPCODE(FPAbs64, T::F64, T::F64 )
OPCODE(FPAdd32, T::F32, T::F32, T::F32 )
OPCODE(FPAdd64, T::F64, T::F64, T::F64 )
OPCODE(FPCompare32, T::Void, T::F32, T::F32, T::U1 )
OPCODE(FPCompare64, T::Void, T::F64, T::F64, T::U1 )
OPCODE(FPDiv32, T::F32, T::F32, T::F32 )
OPCODE(FPDiv64, T::F64, T::F64, T::F64 )
OPCODE(FPMul32, T::F32, T::F32, T::F32 )
OPCODE(FPMul64, T::F64, T::F64, T::F64 )
OPCODE(FPNeg32, T::F32, T::F32 )
OPCODE(FPNeg64, T::F64, T::F64 )
OPCODE(FPSqrt32, T::F32, T::F32 )
OPCODE(FPSqrt64, T::F64, T::F64 )
OPCODE(FPSub32, T::F32, T::F32, T::F32 )
OPCODE(FPSub64, T::F64, T::F64, T::F64 )
OPCODE(FPAbs32, T::U32, T::U32 )
OPCODE(FPAbs64, T::U64, T::U64 )
OPCODE(FPAdd32, T::U32, T::U32, T::U32 )
OPCODE(FPAdd64, T::U64, T::U64, T::U64 )
OPCODE(FPCompare32, T::Void, T::U32, T::U32, T::U1 )
OPCODE(FPCompare64, T::Void, T::U64, T::U64, T::U1 )
OPCODE(FPDiv32, T::U32, T::U32, T::U32 )
OPCODE(FPDiv64, T::U64, T::U64, T::U64 )
OPCODE(FPMul32, T::U32, T::U32, T::U32 )
OPCODE(FPMul64, T::U64, T::U64, T::U64 )
OPCODE(FPNeg32, T::U32, T::U32 )
OPCODE(FPNeg64, T::U64, T::U64 )
OPCODE(FPSqrt32, T::U32, T::U32 )
OPCODE(FPSqrt64, T::U64, T::U64 )
OPCODE(FPSub32, T::U32, T::U32, T::U32 )
OPCODE(FPSub64, T::U64, T::U64, T::U64 )
// Floating-point conversions
OPCODE(FPSingleToDouble, T::F64, T::F32 )
OPCODE(FPDoubleToSingle, T::F32, T::F64 )
OPCODE(FPSingleToU32, T::F32, T::F32, T::U1 )
OPCODE(FPSingleToS32, T::F32, T::F32, T::U1 )
OPCODE(FPDoubleToU32, T::F32, T::F64, T::U1 )
OPCODE(FPDoubleToS32, T::F32, T::F64, T::U1 )
OPCODE(FPU32ToSingle, T::F32, T::F32, T::U1 )
OPCODE(FPS32ToSingle, T::F32, T::F32, T::U1 )
OPCODE(FPU32ToDouble, T::F64, T::F32, T::U1 )
OPCODE(FPS32ToDouble, T::F64, T::F32, T::U1 )
OPCODE(FPSingleToDouble, T::U64, T::U32 )
OPCODE(FPDoubleToSingle, T::U32, T::U64 )
OPCODE(FPSingleToU32, T::U32, T::U32, T::U1 )
OPCODE(FPSingleToS32, T::U32, T::U32, T::U1 )
OPCODE(FPDoubleToU32, T::U32, T::U64, T::U1 )
OPCODE(FPDoubleToS32, T::U32, T::U64, T::U1 )
OPCODE(FPU32ToSingle, T::U32, T::U32, T::U1 )
OPCODE(FPS32ToSingle, T::U32, T::U32, T::U1 )
OPCODE(FPU32ToDouble, T::U64, T::U32, T::U1 )
OPCODE(FPS32ToDouble, T::U64, T::U32, T::U1 )
// A32 Memory access
A32OPC(ClearExclusive, T::Void, )

5
src/frontend/ir/value.h
View File

@@ -97,12 +97,9 @@ using U8 = TypedValue<Type::U8>;
using U16 = TypedValue<Type::U16>;
using U32 = TypedValue<Type::U32>;
using U64 = TypedValue<Type::U64>;
using U128 = TypedValue<Type::U128>;
using U32U64 = TypedValue<Type::U32 | Type::U64>;
using UAny = TypedValue<Type::U8 | Type::U16 | Type::U32 | Type::U64>;
using F32 = TypedValue<Type::F32>;
using F64 = TypedValue<Type::F64>;
using F128 = TypedValue<Type::F128>;
using F32F64 = TypedValue<Type::F32 | Type::F64>;
using NZCV = TypedValue<Type::NZCVFlags>;
} // namespace IR