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A64: Implement SQSHL's vector immediate variant
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@@ -198,6 +198,23 @@ bool TranslatorVisitor::RSHRN(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd)
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return ShiftRightNarrowing(*this, Q, immh, immb, Vn, Vd, Rounding::Round, Narrowing::Truncation, Signedness::Unsigned);
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}
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bool TranslatorVisitor::SQSHL_imm_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
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if (!Q && immh.Bit<3>()) {
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return ReservedValue();
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}
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const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend());
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const size_t datasize = Q ? 128 : 64;
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const size_t shift = concatenate(immh, immb).ZeroExtend() - esize;
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const IR::U128 operand = V(datasize, Vn);
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const IR::U128 shift_vec = ir.VectorBroadcast(esize, I(esize, shift));
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const IR::U128 result = ir.VectorSignedSaturatedShiftLeft(esize, operand, shift_vec);
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V(datasize, Vd, result);
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return true;
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}
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bool TranslatorVisitor::SQSHRN_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
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return ShiftRightNarrowing(*this, Q, immh, immb, Vn, Vd, Rounding::None, Narrowing::SaturateToSigned, Signedness::Signed);
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}
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