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ir: Add IR opcodes for emitting vector shuffles

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This uses the ARM terminology for sizes (Halfword -> 2 bytes, Word -> 4 bytes)
as opposed to the x86 terminology of (Word -> 2 bytes, Double word -> 4 bytes)
This commit is contained in:
Lioncash
2018-03-17 20:32:07 -04:00
committed by MerryMage
parent eb2d28d2b1
commit 6b0010c940
4 changed files with 54 additions and 0 deletions
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12
src/frontend/ir/ir_emitter.cpp
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@@ -1103,6 +1103,18 @@ U128 IREmitter::VectorPopulationCount(const U128& a) {
return Inst<U128>(Opcode::VectorPopulationCount, a);
}
U128 IREmitter::VectorShuffleHighHalfwords(const U128& a, u8 mask) {
return Inst<U128>(Opcode::VectorShuffleHighHalfwords, a, mask);
}
U128 IREmitter::VectorShuffleLowHalfwords(const U128& a, u8 mask) {
return Inst<U128>(Opcode::VectorShuffleLowHalfwords, a, mask);
}
U128 IREmitter::VectorShuffleWords(const U128& a, u8 mask) {
return Inst<U128>(Opcode::VectorShuffleWords, a, mask);
}
U128 IREmitter::VectorSignExtend(size_t original_esize, const U128& a) {
switch (original_esize) {
case 8: