fuzz_arm: Ensure all instructions are fuzzed

* VFP instructions were not getting fuzzed due to matching coprocessor instructions (as invalid instructions)
* Fix VPOP writeback for doubles when (imm8 & 1) == 1
* Do not accidentally fuzz unimplemented unconditional instructions
This commit is contained in:
MerryMage
2020-05-10 13:57:39 +01:00
parent 9a38c7324f
commit 6df660c889
5 changed files with 22 additions and 10 deletions

View File

@@ -643,7 +643,9 @@ bool ArmTranslatorVisitor::vfp_VPOP(Cond cond, bool D, size_t Vd, bool sz, Imm<8
return true;
}
const u32 imm32 = imm8.ZeroExtend() << 2;
auto address = ir.GetRegister(Reg::SP);
ir.SetRegister(Reg::SP, ir.Add(address, ir.Imm32(imm32)));
for (size_t i = 0; i < regs; ++i) {
if (sz) {
@@ -662,7 +664,6 @@ bool ArmTranslatorVisitor::vfp_VPOP(Cond cond, bool D, size_t Vd, bool sz, Imm<8
}
}
ir.SetRegister(Reg::SP, address);
return true;
}