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A64: Implement half-precision variant of FRSQRTE's scalar variant

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Lioncash
2019-04-13 18:38:39 -04:00
committed by MerryMage
parent 037acb17b9
commit 77c84bcf9b
2 changed files with 11 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@@ -438,7 +438,7 @@ INST(FCMLE_2, "FCMLE (zero)", "01111
INST(FCVTPU_2, "FCVTPU (vector)", "011111101z100001101010nnnnnddddd")
//INST(FCVTZU_int_1, "FCVTZU (vector, integer)", "0111111011111001101110nnnnnddddd")
INST(FCVTZU_int_2, "FCVTZU (vector, integer)", "011111101z100001101110nnnnnddddd")
//INST(FRSQRTE_1, "FRSQRTE", "0111111011111001110110nnnnnddddd")
INST(FRSQRTE_1, "FRSQRTE", "0111111011111001110110nnnnnddddd")
INST(FRSQRTE_2, "FRSQRTE", "011111101z100001110110nnnnnddddd")
// Data Processing - FP and SIMD - Scalar three same extra