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A64: Implement SIMD instructions USHLL, USHLL2

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This commit is contained in:
MerryMage
2018-02-10 10:29:07 +00:00
parent 59ace60b03
commit 7ff280827b
5 changed files with 40 additions and 8 deletions
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21
src/frontend/A64/translate/impl/simd_shift_by_immediate.cpp
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@@ -28,4 +28,25 @@ bool TranslatorVisitor::SHL_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd)
return true;
}
bool TranslatorVisitor::USHLL(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
if (immh == 0b0000) {
return DecodeError();
}
if (immh.Bit<3>()) {
return ReservedValue();
}
const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend());
const size_t datasize = 64;
const size_t part = Q ? 1 : 0;
const u8 shift_amount = concatenate(immh, immb).ZeroExtend<u8>() - static_cast<u8>(esize);
const IR::U128 operand = Vpart(datasize, Vn, part);
const IR::U128 expanded_operand = ir.VectorZeroExtend(esize, operand);
const IR::U128 result = ir.VectorLogicalShiftLeft(2 * esize, expanded_operand, shift_amount);
V(2 * datasize, Vd, result);
return true;
}
} // namespace Dynarmic::A64