mirror of
https://git.suyu.dev/suyu/dynarmic.git
synced 2026-02-19 06:49:38 +00:00
A64: Implement SHRN/SHRN2
This commit is contained in:
@@ -68,6 +68,29 @@ bool TranslatorVisitor::SHL_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd)
|
||||
return true;
|
||||
}
|
||||
|
||||
bool TranslatorVisitor::SHRN(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
|
||||
if (immh == 0b0000) {
|
||||
return DecodeError();
|
||||
}
|
||||
|
||||
if (immh.Bit<3>()) {
|
||||
return ReservedValue();
|
||||
}
|
||||
|
||||
const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend());
|
||||
const size_t source_esize = 2 * esize;
|
||||
const size_t part = Q ? 1 : 0;
|
||||
|
||||
const u8 shift_amount = static_cast<u8>(source_esize - concatenate(immh, immb).ZeroExtend());
|
||||
|
||||
const IR::U128 operand = ir.GetQ(Vn);
|
||||
const IR::U128 result = ir.VectorNarrow(source_esize,
|
||||
ir.VectorLogicalShiftRight(source_esize, operand, shift_amount));
|
||||
|
||||
Vpart(64, Vd, part, result);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool TranslatorVisitor::SSHLL(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) {
|
||||
if (immh == 0b0000) {
|
||||
return DecodeError();
|
||||
|
||||
Reference in New Issue
Block a user