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A64: Implement SQDMULH's vector variant

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This commit is contained in:
Lioncash
2018-09-05 17:14:02 -04:00
committed by MerryMage
parent a0231e5546
commit 9c03311fed
2 changed files with 17 additions and 1 deletions
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src/frontend/A64/decoder/a64.inc
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@@ -722,7 +722,7 @@ INST(MLA_vec, "MLA (vector)", "0Q001
INST(MUL_vec, "MUL (vector)", "0Q001110zz1mmmmm100111nnnnnddddd")
INST(SMAXP, "SMAXP", "0Q001110zz1mmmmm101001nnnnnddddd")
INST(SMINP, "SMINP", "0Q001110zz1mmmmm101011nnnnnddddd")
//INST(SQDMULH_vec_2, "SQDMULH (vector)", "0Q001110zz1mmmmm101101nnnnnddddd")
INST(SQDMULH_vec_2, "SQDMULH (vector)", "0Q001110zz1mmmmm101101nnnnnddddd")
INST(ADDP_vec, "ADDP (vector)", "0Q001110zz1mmmmm101111nnnnnddddd")
INST(FMAXNM_2, "FMAXNM (vector)", "0Q0011100z1mmmmm110001nnnnnddddd")
INST(FMLA_vec_2, "FMLA (vector)", "0Q0011100z1mmmmm110011nnnnnddddd")