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A32: Implement ASIMD VMLAL, VMLSL, VMULL (scalar)

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MerryMage
2020-06-21 10:30:10 +01:00
parent 69a1d58a2b
commit 9cc11681dc
3 changed files with 57 additions and 5 deletions
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4
src/frontend/A32/decoder/asimd.inc
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@@ -55,10 +55,10 @@ INST(asimd_VRSQRTS, "VRSQRTS", "111100100D1znnnndddd111
// Two registers and a scalar
INST(arm_UDF, "UNALLOCATED", "1111001-1-11-------------1-0----") // ASIMD
INST(asimd_VMLA_scalar, "VMLA (scalar)", "1111001Q1Dzznnnndddd0o0FN1M0mmmm") // ASIMD
//INST(asimd_VMLAL_scalar, "VMLAL (scalar)", "1111001U1-BB--------0x10-1-0----") // ASIMD
INST(asimd_VMLAL_scalar, "VMLAL (scalar)", "1111001U1dzznnnndddd0o10N1M0mmmm") // ASIMD
//INST(asimd_VQDMLAL, "VQDMLAL/VQDMLSL", "111100101-BB--------0x11-1-0----") // ASIMD
INST(asimd_VMUL_scalar, "VMUL (scalar)", "1111001Q1Dzznnnndddd100FN1M0mmmm") // ASIMD
//INST(asimd_VMULL_scalar, "VMULL (scalar)", "1111001U1-BB--------1010-1-0----") // ASIMD
INST(asimd_VMULL_scalar, "VMULL (scalar)", "1111001U1Dzznnnndddd1010N1M0mmmm") // ASIMD
//INST(asimd_VQDMULL, "VQDMULL", "111100101-BB--------1011-1-0----") // ASIMD
//INST(asimd_VQDMULH, "VQDMULH", "1111001U1-BB--------1100-1-0----") // ASIMD
//INST(asimd_VQRDMULH, "VQRDMULH", "1111001U1-BB--------1101-1-0----") // ASIMD