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A64: Implement AESIMC and AESMC

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This commit is contained in:
Lioncash
2018-01-30 07:56:18 -05:00
committed by MerryMage
parent 744495e23d
commit a5c4fbc783
9 changed files with 189 additions and 2 deletions
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4
src/frontend/A64/decoder/a64.inc
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@@ -343,8 +343,8 @@ INST(UMSUBL, "UMSUBL", "10011
// Data Processing - FP and SIMD - AES
//INST(AESE, "AESE", "0100111000101000010010nnnnnddddd")
//INST(AESD, "AESD", "0100111000101000010110nnnnnddddd")
//INST(AESMC, "AESMC", "0100111000101000011010nnnnnddddd")
//INST(AESIMC, "AESIMC", "0100111000101000011110nnnnnddddd")
INST(AESMC, "AESMC", "0100111000101000011010nnnnnddddd")
INST(AESIMC, "AESIMC", "0100111000101000011110nnnnnddddd")
// Data Processing - FP and SIMD - SHA
//INST(SHA1C, "SHA1C", "01011110000mmmmm000000nnnnnddddd")

27
src/frontend/A64/translate/impl/simd_aes.cpp Normal file
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@@ -0,0 +1,27 @@
/* This file is part of the dynarmic project.
* Copyright (c) 2018 MerryMage
* This software may be used and distributed according to the terms of the GNU
* General Public License version 2 or any later version.
*/
#include "frontend/A64/translate/impl/impl.h"
namespace Dynarmic::A64 {
bool TranslatorVisitor::AESIMC(Vec Vn, Vec Vd) {
const IR::U128 operand = ir.GetQ(Vn);
const IR::U128 result = ir.AESInverseMixColumns(operand);
ir.SetQ(Vd, result);
return true;
}
bool TranslatorVisitor::AESMC(Vec Vn, Vec Vd) {
const IR::U128 operand = ir.GetQ(Vn);
const IR::U128 result = ir.AESMixColumns(operand);
ir.SetQ(Vd, result);
return true;
}
} // namespace Dynarmic::A64

8
src/frontend/ir/ir_emitter.cpp
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@@ -715,6 +715,14 @@ U32 IREmitter::CRC32ISO64(const U32& a, const U64& b) {
return Inst<U32>(Opcode::CRC32ISO64, a, b);
}
U128 IREmitter::AESInverseMixColumns(const U128 &a) {
return Inst<U128>(Opcode::AESInverseMixColumns, a);
}
U128 IREmitter::AESMixColumns(const U128 &a) {
return Inst<U128>(Opcode::AESMixColumns, a);
}
UAny IREmitter::VectorGetElement(size_t esize, const U128& a, size_t index) {
ASSERT_MSG(esize * index < 128, "Invalid index");
switch (esize) {

3
src/frontend/ir/ir_emitter.h
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@@ -195,6 +195,9 @@ public:
U32 CRC32ISO32(const U32& a, const U32& b);
U32 CRC32ISO64(const U32& a, const U64& b);
U128 AESInverseMixColumns(const U128& a);
U128 AESMixColumns(const U128& a);
UAny VectorGetElement(size_t esize, const U128& a, size_t index);
U128 VectorAdd8(const U128& a, const U128& b);
U128 VectorAdd16(const U128& a, const U128& b);

4
src/frontend/ir/opcodes.inc
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@@ -178,6 +178,10 @@ OPCODE(CRC32ISO16, T::U32, T::U32, T::U32
OPCODE(CRC32ISO32, T::U32, T::U32, T::U32 )
OPCODE(CRC32ISO64, T::U32, T::U32, T::U64 )
// AES instructions
OPCODE(AESInverseMixColumns, T::U128, T::U128 )
OPCODE(AESMixColumns, T::U128, T::U128 )
// Vector instructions
OPCODE(VectorGetElement8, T::U8, T::U128, T::U8 )
OPCODE(VectorGetElement16, T::U16, T::U128, T::U8 )