mirror of
https://git.suyu.dev/suyu/dynarmic.git
synced 2026-03-02 01:26:31 +00:00
ir: Add opcodes for left signed saturated shifts
This commit is contained in:
@@ -369,6 +369,10 @@ bool Inst::WritesToFPSRCumulativeSaturationBit() const {
|
||||
case Opcode::VectorSignedSaturatedNeg16:
|
||||
case Opcode::VectorSignedSaturatedNeg32:
|
||||
case Opcode::VectorSignedSaturatedNeg64:
|
||||
case Opcode::VectorSignedSaturatedShiftLeft8:
|
||||
case Opcode::VectorSignedSaturatedShiftLeft16:
|
||||
case Opcode::VectorSignedSaturatedShiftLeft32:
|
||||
case Opcode::VectorSignedSaturatedShiftLeft64:
|
||||
case Opcode::VectorUnsignedSaturatedAccumulateSigned8:
|
||||
case Opcode::VectorUnsignedSaturatedAccumulateSigned16:
|
||||
case Opcode::VectorUnsignedSaturatedAccumulateSigned32:
|
||||
|
||||
Reference in New Issue
Block a user