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opcodes: Add 64-bit CountLeadingZeroes opcode

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This commit is contained in:
Lioncash
2018-01-22 10:51:40 -05:00
committed by MerryMage
parent 4c4efb2213
commit b612782445
4 changed files with 43 additions and 3 deletions
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27
src/backend_x64/emit_x64.cpp
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@@ -1302,7 +1302,7 @@ void EmitX64<JST>::EmitByteReverseDual(EmitContext& ctx, IR::Inst* inst) {
}
template <typename JST>
void EmitX64<JST>::EmitCountLeadingZeros(EmitContext& ctx, IR::Inst* inst) {
void EmitX64<JST>::EmitCountLeadingZeros32(EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
if (code->DoesCpuSupport(Xbyak::util::Cpu::tLZCNT)) {
Xbyak::Reg32 source = ctx.reg_alloc.UseGpr(args[0]).cvt32();
@@ -1326,6 +1326,31 @@ void EmitX64<JST>::EmitCountLeadingZeros(EmitContext& ctx, IR::Inst* inst) {
}
}
template <typename JST>
void EmitX64<JST>::EmitCountLeadingZeros64(EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
if (code->DoesCpuSupport(Xbyak::util::Cpu::tLZCNT)) {
Xbyak::Reg64 source = ctx.reg_alloc.UseGpr(args[0]).cvt64();
Xbyak::Reg64 result = ctx.reg_alloc.ScratchGpr().cvt64();
code->lzcnt(result, source);
ctx.reg_alloc.DefineValue(inst, result);
} else {
Xbyak::Reg64 source = ctx.reg_alloc.UseScratchGpr(args[0]).cvt64();
Xbyak::Reg64 result = ctx.reg_alloc.ScratchGpr().cvt64();
// The result of a bsr of zero is undefined, but zf is set after it.
code->bsr(result, source);
code->mov(source.cvt32(), 0xFFFFFFFF);
code->cmovz(result.cvt32(), source.cvt32());
code->neg(result.cvt32());
code->add(result.cvt32(), 63);
ctx.reg_alloc.DefineValue(inst, result);
}
}
template <typename JST>
void EmitX64<JST>::EmitSignedSaturatedAdd(EmitContext& ctx, IR::Inst* inst) {
auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);