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A64: Implement STXRB, STXRH, STXR, STLXRB, STLXRH, STLXR, LDXRB, LDXRH, LDXR, LDAXRB, LDAXRH, LDAXR

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This commit is contained in:
MerryMage
2018-02-13 00:19:04 +00:00
parent f6a2104ab3
commit b7a2c1a7df
11 changed files with 233 additions and 10 deletions
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18
src/frontend/A64/translate/impl/impl.cpp
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@@ -308,6 +308,24 @@ void TranslatorVisitor::Mem(IR::U64 address, size_t bytesize, AccType /*acctype*
}
}
IR::U32 TranslatorVisitor::ExclusiveMem(IR::U64 address, size_t bytesize, AccType /*acctype*/, IR::UAnyU128 value) {
switch (bytesize) {
case 1:
return ir.ExclusiveWriteMemory8(address, value);
case 2:
return ir.ExclusiveWriteMemory16(address, value);
case 4:
return ir.ExclusiveWriteMemory32(address, value);
case 8:
return ir.ExclusiveWriteMemory64(address, value);
case 16:
return ir.ExclusiveWriteMemory128(address, value);
default:
ASSERT_MSG(false, "Invalid bytesize parameter {}", bytesize);
return {};
}
}
IR::U32U64 TranslatorVisitor::SignExtend(IR::UAny value, size_t to_size) {
switch (to_size) {
case 32: