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ir: Add opcodes for performing rounding halving adds
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@@ -1198,6 +1198,34 @@ U128 IREmitter::VectorRotateRight(size_t esize, const U128& a, u8 amount) {
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VectorLogicalShiftLeft(esize, a, static_cast<u8>(esize - amount)));
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}
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U128 IREmitter::VectorRoundingHalvingAddSigned(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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case 8:
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return Inst<U128>(Opcode::VectorRoundingHalvingAddS8, a, b);
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case 16:
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return Inst<U128>(Opcode::VectorRoundingHalvingAddS16, a, b);
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case 32:
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return Inst<U128>(Opcode::VectorRoundingHalvingAddS32, a, b);
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}
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UNREACHABLE();
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return {};
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}
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U128 IREmitter::VectorRoundingHalvingAddUnsigned(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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case 8:
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return Inst<U128>(Opcode::VectorRoundingHalvingAddU8, a, b);
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case 16:
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return Inst<U128>(Opcode::VectorRoundingHalvingAddU16, a, b);
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case 32:
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return Inst<U128>(Opcode::VectorRoundingHalvingAddU32, a, b);
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}
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UNREACHABLE();
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return {};
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}
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U128 IREmitter::VectorShuffleHighHalfwords(const U128& a, u8 mask) {
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return Inst<U128>(Opcode::VectorShuffleHighHalfwords, a, mask);
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}
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