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arm: Implement STR reg/imm instructions.
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@@ -132,11 +132,22 @@ bool ArmTranslatorVisitor::arm_LDRT() {
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}
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bool ArmTranslatorVisitor::arm_STR_imm(Cond cond, bool P, bool U, bool W, Reg n, Reg d, Imm12 imm12) {
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return InterpretThisInstruction();
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if (ConditionPassed(cond)) {
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const auto address = GetAddressingMode(ir, P, U, W, n, ir.Imm32(imm12));
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ir.WriteMemory32(address, ir.GetRegister(d));
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}
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return true;
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}
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bool ArmTranslatorVisitor::arm_STR_reg(Cond cond, bool P, bool U, bool W, Reg n, Reg d, Imm5 imm5, ShiftType shift, Reg m) {
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return InterpretThisInstruction();
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if (ConditionPassed(cond)) {
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const auto shifted = EmitImmShift(ir.GetRegister(m), shift, imm5, ir.GetCFlag());
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const auto address = GetAddressingMode(ir, P, U, W, n, shifted.result);
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ir.WriteMemory32(address, ir.GetRegister(d));
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}
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return true;
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}
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bool ArmTranslatorVisitor::arm_STRB_imm(Cond cond, bool P, bool U, bool W, Reg n, Reg d, Imm12 imm12) {
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