A64: Handle S32->F32 case for SCVTF (vector)

src/frontend/A64/translate/impl/simd_two_register_misc.cpp

@@ -243,4 +243,23 @@ bool TranslatorVisitor::REV64_asimd(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
     return true;
 }
 
+bool TranslatorVisitor::SCVTF_int_4(bool Q, bool sz, Vec Vn, Vec Vd) {
+    if (sz && !Q) {
+        return ReservedValue();
+    }
+
+    if (sz) {
+        // TODO: Implement
+        return InterpretThisInstruction();
+    }
+
+    const size_t datasize = Q ? 128 : 64;
+
+    const IR::U128 operand = V(datasize, Vn);
+    const IR::U128 result = ir.FPVectorS32ToSingle(operand);
+
+    V(datasize, Vd, result);
+    return true;
+}
+
 } // namespace Dynarmic::A64