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TranslateArm: Implement MRS, MSR (imm), MSR (reg)

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MerryMage
2016-08-14 19:39:16 +01:00
parent 30f3d869cc
commit e164ede4dc
9 changed files with 95 additions and 10 deletions
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2
src/frontend/ir/opcodes.inc
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@@ -10,6 +10,8 @@ OPCODE(GetExtendedRegister64, T::F64, T::ExtRegRef
OPCODE(SetRegister, T::Void, T::RegRef, T::U32 )
OPCODE(SetExtendedRegister32, T::Void, T::ExtRegRef, T::F32 )
OPCODE(SetExtendedRegister64, T::Void, T::ExtRegRef, T::F64 )
OPCODE(GetCpsr, T::U32, )
OPCODE(SetCpsr, T::Void, T::U32 )
OPCODE(GetNFlag, T::U1, )
OPCODE(SetNFlag, T::Void, T::U1 )
OPCODE(GetZFlag, T::U1, )