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A64: Implement FABD in terms of existing IR instructions

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Fixes NaN issue. Closes #306.
This commit is contained in:
MerryMage
2018-07-16 16:51:16 +01:00
parent 1dbe9d95e6
commit e18fca17dc
6 changed files with 5 additions and 42 deletions
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11
src/frontend/ir/ir_emitter.cpp
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@@ -1577,17 +1577,6 @@ U128 IREmitter::FPVectorAbs(size_t esize, const U128& a) {
return {};
}
U128 IREmitter::FPVectorAbsoluteDifference(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 32:
return Inst<U128>(Opcode::FPVectorAbsoluteDifference32, a, b);
case 64:
return Inst<U128>(Opcode::FPVectorAbsoluteDifference64, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::FPVectorAdd(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 32:

1
src/frontend/ir/ir_emitter.h
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@@ -289,7 +289,6 @@ public:
U32 FPU64ToSingle(const U64& a, bool round_to_nearest, bool fpscr_controlled);
U128 FPVectorAbs(size_t esize, const U128& a);
U128 FPVectorAbsoluteDifference(size_t esize, const U128& a, const U128& b);
U128 FPVectorAdd(size_t esize, const U128& a, const U128& b);
U128 FPVectorDiv(size_t esize, const U128& a, const U128& b);
U128 FPVectorEqual(size_t esize, const U128& a, const U128& b);

2
src/frontend/ir/opcodes.inc
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@@ -415,8 +415,6 @@ OPCODE(FPS64ToSingle, T::U32, T::U64, T::U
OPCODE(FPVectorAbs16, T::U128, T::U128 )
OPCODE(FPVectorAbs32, T::U128, T::U128 )
OPCODE(FPVectorAbs64, T::U128, T::U128 )
OPCODE(FPVectorAbsoluteDifference32, T::U128, T::U128, T::U128 )
OPCODE(FPVectorAbsoluteDifference64, T::U128, T::U128, T::U128 )
OPCODE(FPVectorAdd32, T::U128, T::U128, T::U128 )
OPCODE(FPVectorAdd64, T::U128, T::U128, T::U128 )
OPCODE(FPVectorDiv32, T::U128, T::U128, T::U128 )