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A64: Implement SSUBW/SSUBW2
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@@ -24,6 +24,22 @@ bool TranslatorVisitor::SADDW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
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return true;
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}
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bool TranslatorVisitor::SSUBW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
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if (size == 0b11) {
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return ReservedValue();
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}
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const size_t esize = 8 << size.ZeroExtend();
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const size_t part = Q ? 1 : 0;
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const IR::U128 operand1 = V(128, Vn);
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const IR::U128 operand2 = ir.VectorSignExtend(esize, Vpart(64, Vm, part));
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const IR::U128 result = ir.VectorSub(esize * 2, operand1, operand2);
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V(128, Vd, result);
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return true;
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}
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bool TranslatorVisitor::UADDW(bool Q, Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
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if (size == 0b11) {
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return ReservedValue();
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