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A64: Implement STR (register, SIMD&FP), LDR (register, SIMD&FP)

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This commit is contained in:
MerryMage
2018-02-11 01:06:26 +00:00
parent a455ff70c9
commit e7041d7196
4 changed files with 81 additions and 11 deletions
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10
src/frontend/A64/translate/impl/impl.cpp
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@@ -210,12 +210,18 @@ void TranslatorVisitor::V(size_t bitsize, Vec vec, IR::U128 value) {
}
}
IR::UAny TranslatorVisitor::V_scalar(size_t bitsize, Vec vec) {
IR::UAnyU128 TranslatorVisitor::V_scalar(size_t bitsize, Vec vec) {
if (bitsize == 128) {
return V(128, vec);
}
// TODO: Optimize
return ir.VectorGetElement(bitsize, ir.GetQ(vec), 0);
}
void TranslatorVisitor::V_scalar(size_t /*bitsize*/, Vec vec, IR::UAny value) {
void TranslatorVisitor::V_scalar(size_t bitsize, Vec vec, IR::UAnyU128 value) {
if (bitsize == 128) {
return V(128, vec, value);
}
// TODO: Optimize
ir.SetQ(vec, ir.ZeroExtendToQuad(value));
}