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A64: Implement SIMD instructions XTN, XTN2

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MerryMage
2018-02-10 16:47:50 +00:00
parent 132c783320
commit e858ce0b35
5 changed files with 41 additions and 2 deletions
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2
src/frontend/A64/decoder/a64.inc
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@@ -635,7 +635,7 @@ INST(INS_elt, "INS (element)", "01101
//INST(CLS_asimd, "CLS (vector)", "0Q001110zz100000010010nnnnnddddd")
//INST(CNT, "CNT", "0Q001110zz100000010110nnnnnddddd")
//INST(SADALP, "SADALP", "0Q001110zz100000011010nnnnnddddd")
//INST(XTN, "XTN, XTN2", "0Q001110zz100001001010nnnnnddddd")
INST(XTN, "XTN, XTN2", "0Q001110zz100001001010nnnnnddddd")
//INST(FCVTN, "FCVTN, FCVTN2", "0Q0011100z100001011010nnnnnddddd")
//INST(FCVTL, "FCVTL, FCVTL2", "0Q0011100z100001011110nnnnnddddd")
//INST(URECPE, "URECPE", "0Q0011101z100001110010nnnnnddddd")