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Fix VShift terminology

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An arithmetic shift is by definition a signed shift, and a logical shift is by definition an unsigned shift.

- Rename VectorLogicalVShiftS* -> VectorArithmeticVShift*
- Rename VectorLogicalVShiftU* -> VectorLogicalVShift*
This commit is contained in:
MerryMage
2018-09-23 10:50:39 +01:00
parent b51dae790d
commit f0920c0ded
6 changed files with 170 additions and 170 deletions
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40
src/frontend/ir/ir_emitter.cpp
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@@ -888,6 +888,21 @@ U128 IREmitter::VectorArithmeticShiftRight(size_t esize, const U128& a, u8 shift
return {};
}
U128 IREmitter::VectorArithmeticVShift(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorArithmeticVShift8, a, b);
case 16:
return Inst<U128>(Opcode::VectorArithmeticVShift16, a, b);
case 32:
return Inst<U128>(Opcode::VectorArithmeticVShift32, a, b);
case 64:
return Inst<U128>(Opcode::VectorArithmeticVShift64, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorBroadcastLower(size_t esize, const UAny& a) {
switch (esize) {
case 8:
@@ -1145,31 +1160,16 @@ U128 IREmitter::VectorLogicalShiftRight(size_t esize, const U128& a, u8 shift_am
return {};
}
U128 IREmitter::VectorLogicalVShiftSigned(size_t esize, const U128& a, const U128& b) {
U128 IREmitter::VectorLogicalVShift(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorLogicalVShiftS8, a, b);
return Inst<U128>(Opcode::VectorLogicalVShift8, a, b);
case 16:
return Inst<U128>(Opcode::VectorLogicalVShiftS16, a, b);
return Inst<U128>(Opcode::VectorLogicalVShift16, a, b);
case 32:
return Inst<U128>(Opcode::VectorLogicalVShiftS32, a, b);
return Inst<U128>(Opcode::VectorLogicalVShift32, a, b);
case 64:
return Inst<U128>(Opcode::VectorLogicalVShiftS64, a, b);
}
UNREACHABLE();
return {};
}
U128 IREmitter::VectorLogicalVShiftUnsigned(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:
return Inst<U128>(Opcode::VectorLogicalVShiftU8, a, b);
case 16:
return Inst<U128>(Opcode::VectorLogicalVShiftU16, a, b);
case 32:
return Inst<U128>(Opcode::VectorLogicalVShiftU32, a, b);
case 64:
return Inst<U128>(Opcode::VectorLogicalVShiftU64, a, b);
return Inst<U128>(Opcode::VectorLogicalVShift64, a, b);
}
UNREACHABLE();
return {};