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A32: Implement ASIMD VMVN (register)

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Fairly straightforward
This commit is contained in:
Lioncash
2020-06-18 21:58:17 -04:00
committed by merry
parent b759773b3b
commit fbdae61c13
3 changed files with 21 additions and 1 deletions
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19
src/frontend/A32/translate/impl/asimd_two_regs_misc.cpp
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@@ -133,6 +133,25 @@ bool ArmTranslatorVisitor::asimd_VCNT(bool D, size_t sz, size_t Vd, bool Q, bool
return true;
}
bool ArmTranslatorVisitor::asimd_VMVN_reg(bool D, size_t sz, size_t Vd, bool Q, bool M, size_t Vm) {
if (sz != 0b00) {
return UndefinedInstruction();
}
if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) {
return UndefinedInstruction();
}
const auto d = ToVector(Q, Vd, D);
const auto m = ToVector(Q, Vm, M);
const auto reg_m = ir.GetVector(m);
const auto result = ir.VectorNot(reg_m);
ir.SetVector(d, result);
return true;
}
bool ArmTranslatorVisitor::asimd_VQABS(bool D, size_t sz, size_t Vd, bool Q, bool M, size_t Vm) {
if (sz == 0b11) {
return UndefinedInstruction();