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1896 Commits

Author SHA1 Message Date
MerryMage
c59a127e86 opcodes: Switch from std::map to std::array 
Optimization.
 2020-05-17 17:01:39 +01:00
MerryMage
d0b45f6150 A32: Implement ARMv8 VST{1-4} (multiple) 2020-05-17 17:01:39 +01:00
Lioncash
eb332b3836 asimd_three_same: Unify BitwiseInstructionWithDst with BitwiseInstruction 
Now that all bitwise instructions are implemented, we can unify all of
them together using if constexpr.
 2020-05-16 20:22:12 +01:00
Lioncash
f42b3ad4a0 A32: Implement ASIMD VBIF (register) 2020-05-16 20:22:12 +01:00
Lioncash
ee9a81dcba A32: Implement ASIMD VBIT (register) 2020-05-16 20:22:12 +01:00
Lioncash
d624059ead A32: Implement ASIMD VBSL (register) 2020-05-16 20:22:12 +01:00
Lioncash
66663cf8e7 asimd_three_same: Collapse all bitwise implementations into a single code path 
Less code and results in only writing the parts that matter once.
 2020-05-16 20:22:12 +01:00
Lioncash
4b5e3437cf A32: Implement ASIMD VEOR (register) 2020-05-16 20:22:12 +01:00
Lioncash
67b284f6fa A32: Implement ASIMD VORN (register) 2020-05-16 20:22:12 +01:00
Lioncash
1fdd90ca2a A32: Implement ASIMD VORR (register) 2020-05-16 20:22:12 +01:00
Lioncash
9b93a9de46 a32_jitstate: Remove obsoleted debug assert 2020-05-16 20:22:12 +01:00
Lioncash
64fa804dd4 A32: Implement ASIMD VBIC (register) 2020-05-16 20:22:12 +01:00
Lioncash
0441ab81a1 A32: Implement ASIMD VAND (register) 2020-05-16 20:22:12 +01:00
Lioncash
1b25e867ae asimd_load_store_structures: Simplify ToExtRegD() 
ExtReg has a supplied operator+, so we can make use of that instead.
 2020-05-16 11:27:22 -04:00
MerryMage
2169653c50 a64_emit_x64: Invalid regalloc code for EmitA64ExclusiveReadMemory128 
Attempted to allocate args[0] after end of allocation scope
 2020-05-16 14:11:23 +01:00
MerryMage
1a0bc5ba91 A32/ASIMD: ARMv8: Implement VLD{1-4} (multiple) 2020-05-16 14:11:23 +01:00
MerryMage
e7f1a0d408 A32: ARMv8: Implement LDA{,EX}{,B,D,H} and STL{,EX}{,B,D,H} 2020-05-15 21:07:36 +01:00
Lioncash
af3b65b135 decoder_detail: Mark GetMaskAndExpect() as constexpr 
Elides quite a bit of code at runtime when constructing the decoding
tables.
 2020-05-11 08:29:06 +01:00
MerryMage
59db2c191a VFPv3: Implement VMOV (immediate) 2020-05-10 15:09:37 +01:00
MerryMage
3c86d58064 VFPv4: Implement VCVTB, VCVTT 2020-05-10 14:45:18 +01:00
MerryMage
010fab9a0e VFPv4: Implement VFMA, VFMS 2020-05-10 14:20:11 +01:00
MerryMage
8e97b10acb VFPv4: Implement VFNMS, VFNMA 2020-05-10 14:14:03 +01:00
MerryMage
6df660c889 fuzz_arm: Ensure all instructions are fuzzed 
* VFP instructions were not getting fuzzed due to matching coprocessor instructions (as invalid instructions)
* Fix VPOP writeback for doubles when (imm8 & 1) == 1
* Do not accidentally fuzz unimplemented unconditional instructions
 2020-05-10 13:57:39 +01:00
MerryMage
9a38c7324f A32: Add decoders for remaining v7 instructions 2020-05-10 10:50:34 +01:00
MerryMage
8b3bc92bce backend/x64: Reduce conversions required for cpsr_nzcv 
The guest program often accesses the NZCV flags directly much less
often than we need to use them for jumps and other such uses.

Therefore, we store our flags in cpsr_nzcv in a x64-friendly format.

This allows for a reduction in conditional jump related code.
 2020-05-06 22:38:06 +01:00
Fernando Sahmkow
d7abae1e31 A64: Implement Exceptional Exit. 2020-05-03 01:40:37 +01:00
Fernando Sahmkow
41521ed856 User Config: Add option to specify wall clock CNTPCT. 2020-05-03 01:40:37 +01:00
Fernando Sahmkow
97b9d3e058 Exclusive Monitor: Rework exclusive monitor interface. 2020-05-03 01:40:37 +01:00
Fernando Sahmkow
b5d8b24a3c Exclusive Monitor: Allow clearing a single processor. 2020-05-03 01:40:36 +01:00
Fernando Sahmkow
2068658a82 A64 Interface: Allow changing processor id. 
This commit allows the JIT to be used per guest thread and change it's
core when the thread is migrated.
 2020-05-03 01:40:36 +01:00
MerryMage
24229ab899 constant_propagation_pass: Don't fold add if we nee flags 
Results in incorrect flags
 2020-04-29 15:33:12 +01:00
MerryMage
e7166e8ba7 constant_propagation_pass: Fold add and sub 2020-04-29 14:16:17 +01:00
MerryMage
dca983803a translate_arm: ConditionPassed: Some instructions emit no microinstructions 2020-04-24 13:12:13 +01:00
MerryMage
94d0d33e02 Fix single stepping for certain instructions 
Several issues:
1. Several terminal instructions did not stop at the end of a single-step block
2. x64 backend for the A32 frontend sometimes polluted upper_location_descriptor with the single-stepping flag

We also introduce the enable_optimizations parameter to the A32 frontend.
 2020-04-24 11:44:38 +01:00
MerryMage
69061d87fa exception_handler_windows: Ignore irrelevant exceptions 2020-04-23 20:58:24 +01:00
MerryMage
5c0bb5cc63 Remove unreachable code (MSVC warnings) 2020-04-23 16:36:34 +01:00
MerryMage
a8a712c801 Relicense to 0BSD 2020-04-23 15:45:57 +01:00
MerryMage
d51a83d265 constant_propagation_pass: Fold IsZero 2020-04-22 21:07:09 +01:00
MerryMage
df1a0eecaf constant_propagation_pass: Fold shifts 2020-04-22 21:07:09 +01:00
MerryMage
7242388577 A64: Specialize arithmetic shift SBFM aliases 2020-04-22 21:07:09 +01:00
MerryMage
a13392e432 A64: Specialize sign-extension SBFM aliases 2020-04-22 21:07:09 +01:00
MerryMage
4573511fe3 constant_propagation_pass: Prepare for IR matchers 2020-04-22 21:07:09 +01:00
MerryMage
0d7476d3ec constant_propagation_pass: Propagate constants across commutative operations 
e.g. (a & b) & c == a & (b & c) where b and c are constants
 2020-04-22 21:07:09 +01:00
MerryMage
f59b9fb020 IR: Add ReplicateBit microinstruction 2020-04-22 21:07:09 +01:00
MerryMage
93adcfa5c6 value: Add GetInstRecursive 2020-04-22 21:06:18 +01:00
MerryMage
996d5cb841 ir_opt: Add IdentityRemovalPass 2020-04-22 21:06:18 +01:00
MerryMage
2ae68b13ed value: Add IsIdentity function 2020-04-22 21:06:18 +01:00
MerryMage
8db4d65587 A64/decoder: Use a lookup table instead of doing a linear scan 2020-04-22 21:06:18 +01:00
MerryMage
0c51313479 A64: Add enable_optimizations configuration option 
Allow library users to disable optimizations for debugging reasons.
 2020-04-22 21:06:18 +01:00
MerryMage
8bef1afb9a emit_x64_floating_point: SSE2 implementation for DenormalsAreZero 2020-04-22 21:06:18 +01:00
MerryMage
7c917f1c12 CMakeLists: Add DYNARMIC_FRONTENDS option 
Allows library user to select which frontends to enable
 2020-04-22 21:06:18 +01:00
MerryMage
668a43f815 A32: Detect unpredictable LDM/STM instructions 2020-04-22 21:06:18 +01:00
MerryMage
cd1560c664 emit_x64: Do not clear fast_dispatch_table unnecessarily 
Reduces invalidation overhead
 2020-04-22 21:06:18 +01:00
MerryMage
35402a9a17 a64_emit_x64: Fix location descriptor generation in GenTerminalHandlers 2020-04-22 21:06:18 +01:00
MerryMage
2770115757 emit_x64_data_processing: EmitMaskedShift: Use appropriately sized immediates 2020-04-22 21:06:18 +01:00
MerryMage
cc012a830c exception_handler_windows: Do not attempt to call cb when cb isn't callable 2020-04-22 21:06:18 +01:00
MerryMage
4e83e81e58 backend/x64: Add fastmem support to Windows exception handler 2020-04-22 21:06:18 +01:00
MerryMage
b7b71d65c2 backend/x64: Add POSIX exception handler with fastmem support 2020-04-22 21:06:18 +01:00
MerryMage
2d348d2d68 backend/x64: Add macOS exception handler with fastmem support 2020-04-22 21:06:18 +01:00
MerryMage
4636055646 a32_emit_x64: Implement fastmem 2020-04-22 21:06:17 +01:00
MerryMage
f9b9081d4c a32_emit_x64: Fully wrapped memory fallbacks 
In the same style as the A64 backend
 2020-04-22 21:06:17 +01:00
MerryMage
ad52c997f4 a32_emit_x64: Use r14 for page_table pointer 2020-04-22 21:06:17 +01:00
MerryMage
49fcfe040c reg_alloc: Explicitly specify GPR and XMM order 
This allows each backend to modify what registers they want to use and their preferred orderings
 2020-04-22 21:06:17 +01:00
MerryMage
c232ad7971 a32_emit_x64: Make {Read,Write}Memory member functions of A32EmitX64 2020-04-22 21:06:17 +01:00
MerryMage
5267dbb8cf emit_x64_saturation: Prefer changeBit to setBit 2020-04-22 21:06:17 +01:00
MerryMage
9d60d92692 backend/x64: Make ExceptionHandler its own class 2020-04-22 21:06:17 +01:00
MerryMage
325808949f backend/x64: Rename namespace BackendX64 -> Backend::X64 2020-04-22 21:06:17 +01:00
MerryMage
f569d7913c block_of_code: Reduce jmps in dispatcher loop 2020-04-22 21:06:17 +01:00
MerryMage
7e0c415473 block_of_code: Always specify codeptr to run from 2020-04-22 21:06:17 +01:00
MerryMage
b6536115ef A32: Add Step 2020-04-22 21:06:17 +01:00
MerryMage
f69c77391e A64: Add Step 
Allow for stepping instruction-by-instruction
 2020-04-22 21:06:17 +01:00
MerryMage
09d3c77d74 IR: Add masked shift IR instructions 
Also use these in the A64 frontend to avoid the need to mask the shift amount.
 2020-04-22 21:06:17 +01:00
MerryMage
bd88286b21 cast_util: Add FptrCast 
Reduce unnecessary type duplication when casting a lambda to a function pointer.
 2020-04-22 21:06:17 +01:00
MerryMage
fe583aa076 lut_from_list: Reduce number of required template arguments 2020-04-22 21:06:17 +01:00
MerryMage
81fcb4e537 mp: Migrate to shared version of mp library 2020-04-22 21:06:17 +01:00
MerryMage
28e5af20b5 mp/function_info: Add parameter_count_v 2020-04-22 21:04:24 +01:00
MerryMage
aa225a7dc4 bit_util: Add CountLeadingZeros 2020-04-22 21:04:24 +01:00
MerryMage
25e27282e3 a64_emit_x64: Reduce patchpoint sizes 2020-04-22 21:04:23 +01:00
MerryMage
a59c335b05 A64: Add options for detecting misaligned loads and stores 2020-04-22 21:04:23 +01:00
Marshall Mohror
1ebc1895ee A32/x64: Create a global_offset optimization for the page table (#507) 
Instead of looking up the page table like:
  table[addr >> 12][addr & 0xFFF]
We can use a global offset on the table to query the memory like:
  table[addr >> 12][addr]

This saves two instructions on *every* memory access within the recompiler.

Original change by degasus in A64 emitter
 2020-04-22 21:04:23 +01:00
MerryMage
e10985d179 ir/basic_block: Add FastDispatchHint to TerminalToString 
Use a boost::static_visitor to ensure this is caught at compile-time in the future.
 2020-04-22 21:04:23 +01:00
Lioncash
af3614553b A64/impl: Move AccType and MemOp enum into general IR emitter header 
These will be used by both frontends in the future, so this performs the
migratory changes separate from the changes that will make use of them.
 2020-04-22 21:04:23 +01:00
Markus Wick
93668c24be A64/x64: Create a global_offset optimization for the page table. 
Instead of looking up the page table like:
  table[addr >> 12][addr & 0xFFF]
We can use a global offset on the table to query the memory like:
  table[addr >> 12][addr]

This saves two instructions on *every* memory access within the recompiler.

Thanks at skmp for the idea.
 2020-04-22 21:04:23 +01:00
MerryMage
6325ac23eb a32_emit_x64: Use std::get_if in EmitA32Coproc* 2020-04-22 21:04:23 +01:00
MerryMage
39bd2c034d constant_propagation_pass: Handle GetCarryFromOp for MostSignificantWord 2020-04-22 21:04:23 +01:00
MerryMage
ada66d7092 a32_interface: Remove unused TransferJitState function 2020-04-22 21:04:23 +01:00
MerryMage
b4884a51e0 a32_jitstate: Only transfer required state 
Importantly, reset exclusive state upon transfer.
 2020-04-22 21:04:23 +01:00
MerryMage
1aa7b62e92 A32/Thumb: Correct behaviour for UDF and Unpredictable instructions 
Raise an exception instead of calling the interpreter and ASSERT-ing respectively.
 2020-04-22 21:04:23 +01:00
MerryMage
c7d20f3f2f fuzz_arm: Test MSR and MRS instructions against unicorn 
* Add always_little_endian option to mach unicorn behavior.
* Correct CPSR.Mode = Usermode
 2020-04-22 21:04:23 +01:00
MerryMage
2f06ef5d4e a32_emit_x64: EmitA32SetCpsr: BUGFIX: Actually set CPSR.GE 
Was unintentionally masking the writing of CPSR.GE due to 32-bit immediate sign extension.
 2020-04-22 21:04:23 +01:00
MerryMage
0a6f822d76 a32_emit_x64: GenTerminalHandlers: Remove unnecessary mov 2020-04-22 21:04:23 +01:00
MerryMage
717bd2fbb2 A64: Add hook_hint_instructions option 2020-04-22 21:04:23 +01:00
MerryMage
396116ee61 A32: Add hook_hint_instructions option 2020-04-22 21:04:23 +01:00
MerryMage
2f2a859615 a32_jitstate: Consolidate upper bits of location descriptor into upper_location_descriptor 
Also solves a performance regression initially introduced by b6e8297e369f2dc4758bafe944e51efb8d1a2552,
primarily due to excessively mismatched load/store sizes causing less than optimal load-to-store forwarding.
 2020-04-22 21:04:23 +01:00
MerryMage
e41a7dc678 CMakeLists: Temporarily remove export 
Unable to export fmt in projects that have DYNARMIC_NO_BUNDLED_FMT enabled
 2020-04-22 21:04:22 +01:00
Merry
1c97edac77 Merge pull request #503 from lioncash/cmp 
A64: Implement half-precision variants of FCMEQ
 2020-04-22 21:04:22 +01:00
Merry
f252a62c1b Merge pull request #502 from lioncash/header 
General: Remove unnecessary includes
 2020-04-22 21:04:22 +01:00
Lioncash
11d1114a17 A64: Implement all half-precision variants of FCMEQ 2020-04-22 21:04:22 +01:00
Lioncash
22bd95902d backend/x64/reg_alloc: Apply const where applicable 
Also tidies up bracing where applicable along the way.
 2020-04-22 21:04:22 +01:00
Lioncash
349d4b577a General: Remove unnecessary includes 
Removes unnecessary header dependencies that have accumulated over time
as changes have been made. Lessens the amount of files that need to be
rebuilt when the headers change.
 2020-04-22 21:04:22 +01:00