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4b5e3437cf6246d33c244533b5a1570260844a02
dynarmic/src/frontend/A32/translate/impl
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Lioncash 4b5e3437cf A32: Implement ASIMD VEOR (register)
2020-05-16 20:22:12 +01:00
..
asimd_load_store_structures.cpp
asimd_load_store_structures: Simplify ToExtRegD()
2020-05-16 11:27:22 -04:00
asimd_three_same.cpp
A32: Implement ASIMD VEOR (register)
2020-05-16 20:22:12 +01:00
barrier.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
branch.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
coprocessor.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
crc32.cpp
Remove unreachable code (MSVC warnings)
2020-04-23 16:36:34 +01:00
data_processing.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
divide.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
exception_generating.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
extension.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
hint.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
load_store.cpp
fuzz_arm: Ensure all instructions are fuzzed
2020-05-10 13:57:39 +01:00
misc.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
multiply.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
packing.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
parallel.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
reversal.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
saturated.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
status_register_access.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
synchronization.cpp
A32: ARMv8: Implement LDA{,EX}{,B,D,H} and STL{,EX}{,B,D,H}
2020-05-15 21:07:36 +01:00
thumb16.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
thumb32.cpp
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
translate_arm.h
A32: Implement ASIMD VEOR (register)
2020-05-16 20:22:12 +01:00
translate_thumb.h
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
vfp.cpp
VFPv3: Implement VMOV (immediate)
2020-05-10 15:09:37 +01:00