Lioncash 6b0010c940 ir: Add IR opcodes for emitting vector shuffles ... This uses the ARM terminology for sizes (Halfword -> 2 bytes, Word -> 4 bytes) as opposed to the x86 terminology of (Word -> 2 bytes, Double word -> 4 bytes)		2020-04-22 20:46:15 +01:00
..
basic_block.cpp	basic_block: Fix bogus GCC maybe-uninitialized warning	2020-04-22 20:46:13 +01:00
basic_block.h	basic_block: Fix bogus GCC maybe-uninitialized warning	2020-04-22 20:46:13 +01:00
cond.h	Label A32 specific code appropriately	2020-04-22 20:33:30 +01:00
ir_emitter.cpp	ir: Add IR opcodes for emitting vector shuffles	2020-04-22 20:46:15 +01:00
ir_emitter.h	ir: Add IR opcodes for emitting vector shuffles	2020-04-22 20:46:15 +01:00
location_descriptor.cpp	General: Convert multiple namespace specifiers to nested namespace specifiers where applicable	2020-04-22 20:44:38 +01:00
location_descriptor.h	General: Convert multiple namespace specifiers to nested namespace specifiers where applicable	2020-04-22 20:44:38 +01:00
microinstruction.cpp	A64: Implement system registers FPCR and FPSR	2020-04-22 20:46:15 +01:00
microinstruction.h	Forward declare IR::Opcode and IR::Type where possible	2020-04-22 20:46:14 +01:00
opcodes.cpp	Forward declare IR::Opcode and IR::Type where possible	2020-04-22 20:46:14 +01:00
opcodes.h	Forward declare IR::Opcode and IR::Type where possible	2020-04-22 20:46:14 +01:00
opcodes.inc	ir: Add IR opcodes for emitting vector shuffles	2020-04-22 20:46:15 +01:00
terminal.h	General: Convert multiple namespace specifiers to nested namespace specifiers where applicable	2020-04-22 20:44:38 +01:00
type.cpp	Forward declare IR::Opcode and IR::Type where possible	2020-04-22 20:46:14 +01:00
type.h	Forward declare IR::Opcode and IR::Type where possible	2020-04-22 20:46:14 +01:00
value.cpp	Forward declare IR::Opcode and IR::Type where possible	2020-04-22 20:46:14 +01:00
value.h	Forward declare IR::Opcode and IR::Type where possible	2020-04-22 20:46:14 +01:00