James Rowe ae880d8391 A64: Fix bugs and address review comments

2020-04-22 20:44:38 +01:00

..

branch.cpp

A64/translate/branch: bug: Read-after-write error in BLR

2020-04-22 20:42:45 +01:00

data_processing_addsub.cpp

A64/data_processing_addsub: bug: {ADD,SUB}S (extended register) instructions write to ZR when d = 31

2020-04-22 20:42:45 +01:00

data_processing_bitfield.cpp

A64: Implement SBFM, BFM, UBFM

2020-04-22 20:42:45 +01:00

data_processing_conditional_select.cpp

data_processsing_conditional_select: Implement CSINC, CSINV and CSNEG

2020-04-22 20:42:46 +01:00

data_processing_logical.cpp

A64: Implement logical

2020-04-22 20:42:45 +01:00

data_processing_multiply.cpp

Implemented SDIV and UDIV instructions

2020-04-22 20:44:37 +01:00

data_processing_pcrel.cpp

A64/data_processing_pcrel: bug: ADR{,P} instructions sign extend their immediate

2020-04-22 20:42:45 +01:00

data_processing_register.cpp

A64: Implement RBIT

2020-04-22 20:44:37 +01:00

data_processing_shift.cpp

A64: Implement ASRV, LSLV, LSRV, and RORV

2020-04-22 20:42:46 +01:00

exception_generating.cpp

A64: Implement SBFM, BFM, UBFM

2020-04-22 20:42:45 +01:00

impl.cpp

IR: Add IR instructions A64Memory{Read,Write}128

2020-04-22 20:44:37 +01:00

impl.h

A64: Implement Load/Store register (unprivileged)

2020-04-22 20:44:37 +01:00

load_store_load_literal.cpp

A32: Implement load stores (immediate)

2020-04-22 20:42:45 +01:00

load_store_register_immediate.cpp

A64: Implement LDR/STR (immediate, SIMD&FP)

2020-04-22 20:44:37 +01:00

load_store_register_pair.cpp

Misc. fixups of MSVC build

2020-04-22 20:42:45 +01:00

load_store_register_unprivileged.cpp

A64: Fix bugs and address review comments

2020-04-22 20:44:38 +01:00

move_wide.cpp

A64: Implement MOVN, MOVZ, MOVK

2020-04-22 20:42:45 +01:00

simd_copy.cpp

A64: Implement DUP (general)

2020-04-22 20:44:37 +01:00

simd_three_same.cpp

A64: Implement ADDP (vector)

2020-04-22 20:42:46 +01:00

system.cpp

A64: Implement HINT, NOP, YIELD, WFE, WFI, SEV, and SEVL

2020-04-22 20:42:46 +01:00