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This code was bugged in that we were comparing if the rounding mode was not equal to rounding towards zero. Fortunately, however, nothing uses this function anymore, and there's already the more general FPSCR_RMode() available, so this can be removed entirely.
92 lines
3.4 KiB
C++
92 lines
3.4 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#pragma once
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#include <map>
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#include <tuple>
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#include "backend_x64/a64_jitstate.h"
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#include "backend_x64/block_range_information.h"
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#include "backend_x64/emit_x64.h"
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#include "dynarmic/A64/config.h"
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#include "frontend/A64/location_descriptor.h"
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#include "frontend/ir/terminal.h"
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namespace Dynarmic::BackendX64 {
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class RegAlloc;
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struct A64EmitContext final : public EmitContext {
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A64EmitContext(const A64::UserConfig& conf, RegAlloc& reg_alloc, IR::Block& block);
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A64::LocationDescriptor Location() const;
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FP::RoundingMode FPSCR_RMode() const override;
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u32 FPCR() const override;
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bool FPSCR_FTZ() const override;
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bool FPSCR_DN() const override;
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bool AccurateNaN() const override;
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const A64::UserConfig& conf;
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};
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class A64EmitX64 final : public EmitX64 {
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public:
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A64EmitX64(BlockOfCode& code, A64::UserConfig conf);
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~A64EmitX64() override;
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/**
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* Emit host machine code for a basic block with intermediate representation `ir`.
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* @note ir is modified.
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*/
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BlockDescriptor Emit(IR::Block& ir);
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void ClearCache() override;
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void InvalidateCacheRanges(const boost::icl::interval_set<u64>& ranges);
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protected:
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const A64::UserConfig conf;
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BlockRangeInformation<u64> block_ranges;
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void (*memory_read_128)();
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void (*memory_write_128)();
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void GenMemory128Accessors();
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std::map<std::tuple<size_t, int, int>, void(*)()> read_fallbacks;
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std::map<std::tuple<size_t, int, int>, void(*)()> write_fallbacks;
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void GenFastmemFallbacks();
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void EmitDirectPageTableMemoryRead(A64EmitContext& ctx, IR::Inst* inst, size_t bitsize);
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void EmitDirectPageTableMemoryWrite(A64EmitContext& ctx, IR::Inst* inst, size_t bitsize);
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void EmitExclusiveWrite(A64EmitContext& ctx, IR::Inst* inst, size_t bitsize);
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// Microinstruction emitters
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#define OPCODE(...)
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#define A32OPC(...)
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#define A64OPC(name, type, ...) void EmitA64##name(A64EmitContext& ctx, IR::Inst* inst);
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#include "frontend/ir/opcodes.inc"
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#undef OPCODE
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#undef A32OPC
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#undef A64OPC
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// Terminal instruction emitters
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void EmitTerminalImpl(IR::Term::Interpret terminal, IR::LocationDescriptor initial_location) override;
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void EmitTerminalImpl(IR::Term::ReturnToDispatch terminal, IR::LocationDescriptor initial_location) override;
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void EmitTerminalImpl(IR::Term::LinkBlock terminal, IR::LocationDescriptor initial_location) override;
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void EmitTerminalImpl(IR::Term::LinkBlockFast terminal, IR::LocationDescriptor initial_location) override;
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void EmitTerminalImpl(IR::Term::PopRSBHint terminal, IR::LocationDescriptor initial_location) override;
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void EmitTerminalImpl(IR::Term::If terminal, IR::LocationDescriptor initial_location) override;
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void EmitTerminalImpl(IR::Term::CheckBit terminal, IR::LocationDescriptor initial_location) override;
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void EmitTerminalImpl(IR::Term::CheckHalt terminal, IR::LocationDescriptor initial_location) override;
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// Patching
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void EmitPatchJg(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr = nullptr) override;
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void EmitPatchJmp(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr = nullptr) override;
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void EmitPatchMovRcx(CodePtr target_code_ptr = nullptr) override;
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};
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} // namespace Dynarmic::BackendX64
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