8 Commits

Author	SHA1	Message	Date
Lioncash	00b2f9b319	asimd: Prevent misdecodes from occurring ... Pointed out by Mary when reviewing the shift code.	2020-06-18 15:04:48 -04:00
Lioncash	6ca20c2fe3	A32: Implement ASIMD VSLI	2020-06-18 11:51:08 -04:00
Lioncash	887732d8a8	A32: Implement ASIMD VSRI	2020-06-18 11:28:12 -04:00
Lioncash	8b98c91ecc	A32: Implement ASIMD VSHL	2020-06-18 11:18:33 -04:00
Lioncash	69c999bc66	A32: Implement ASIMD VRSRA ... Now that we have the accumulation and rounding code in place, VRSRA is extremely trivial to implement.	2020-06-18 11:03:39 -04:00
Lioncash	14fdd15199	A32: Implement ASIMD VRSHR	2020-06-18 11:00:45 -04:00
Lioncash	276e0b71dc	A32: Implement ASIMD VSRA	2020-06-18 11:00:27 -04:00
Lioncash	6c142bc5cc	A32: Implement ASIMD VSHR	2020-06-18 10:30:20 -04:00